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author | Richard Henderson | 2020-09-04 00:56:24 +0200 |
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committer | Richard Henderson | 2020-10-08 12:57:32 +0200 |
commit | 74a117906b87ff9220e4baae5a7431d6f4eadd45 (patch) | |
tree | d99fbe2a152523b0dd5b73fbd22e46aa2bdfd7cf /tcg/s390/tcg-target.c.inc | |
parent | tcg: Move sorted_args into TCGArgConstraint.sort_index (diff) | |
download | qemu-74a117906b87ff9220e4baae5a7431d6f4eadd45.tar.gz qemu-74a117906b87ff9220e4baae5a7431d6f4eadd45.tar.xz qemu-74a117906b87ff9220e4baae5a7431d6f4eadd45.zip |
tcg: Remove TCG_CT_REG
This wasn't actually used for anything, really. All variable
operands must accept registers, and which are indicated by the
set in TCGArgConstraint.regs.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/s390/tcg-target.c.inc')
-rw-r--r-- | tcg/s390/tcg-target.c.inc | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/tcg/s390/tcg-target.c.inc b/tcg/s390/tcg-target.c.inc index 9cd266a2d0..c5e096449b 100644 --- a/tcg/s390/tcg-target.c.inc +++ b/tcg/s390/tcg-target.c.inc @@ -408,23 +408,19 @@ static const char *target_parse_constraint(TCGArgConstraint *ct, { switch (*ct_str++) { case 'r': /* all registers */ - ct->ct |= TCG_CT_REG; ct->regs = 0xffff; break; case 'L': /* qemu_ld/st constraint */ - ct->ct |= TCG_CT_REG; ct->regs = 0xffff; tcg_regset_reset_reg(ct->regs, TCG_REG_R2); tcg_regset_reset_reg(ct->regs, TCG_REG_R3); tcg_regset_reset_reg(ct->regs, TCG_REG_R4); break; case 'a': /* force R2 for division */ - ct->ct |= TCG_CT_REG; ct->regs = 0; tcg_regset_set_reg(ct->regs, TCG_REG_R2); break; case 'b': /* force R3 for division */ - ct->ct |= TCG_CT_REG; ct->regs = 0; tcg_regset_set_reg(ct->regs, TCG_REG_R3); break; |