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author | Richard Henderson | 2020-12-09 20:58:39 +0100 |
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committer | Richard Henderson | 2021-01-07 16:09:06 +0100 |
commit | 07ce0b05300de5bc8f1932a4cfbe38f3323e5ab1 (patch) | |
tree | a22f2b213b2cb96c8e0e30c69bca9edb00b678bc /tcg/s390/tcg-target.h | |
parent | tcg/i386: Adjust TCG_TARGET_HAS_MEMORY_BSWAP (diff) | |
download | qemu-07ce0b05300de5bc8f1932a4cfbe38f3323e5ab1.tar.gz qemu-07ce0b05300de5bc8f1932a4cfbe38f3323e5ab1.tar.xz qemu-07ce0b05300de5bc8f1932a4cfbe38f3323e5ab1.zip |
tcg: Introduce INDEX_op_qemu_st8_i32
Enable this on i386 to restrict the set of input registers
for an 8-bit store, as required by the architecture. This
removes the last use of scratch registers for user-only mode.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/s390/tcg-target.h')
-rw-r--r-- | tcg/s390/tcg-target.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/tcg/s390/tcg-target.h b/tcg/s390/tcg-target.h index b4feb2f55a..69576f4a9a 100644 --- a/tcg/s390/tcg-target.h +++ b/tcg/s390/tcg-target.h @@ -97,6 +97,7 @@ extern uint64_t s390_facilities; #define TCG_TARGET_HAS_extrh_i64_i32 0 #define TCG_TARGET_HAS_goto_ptr 1 #define TCG_TARGET_HAS_direct_jump (s390_facilities & FACILITY_GEN_INST_EXT) +#define TCG_TARGET_HAS_qemu_st8_i32 0 #define TCG_TARGET_HAS_div2_i64 1 #define TCG_TARGET_HAS_rot_i64 1 |