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| author | Richard Henderson | 2010-01-12 20:59:34 +0100 |
|---|---|---|
| committer | Blue Swirl | 2010-01-12 20:59:34 +0100 |
| commit | cc6dfecf02eadbdc14100dff54aec4df0c139393 (patch) | |
| tree | 5e16cac5c282dd7e3ff5270cb28aaa236c5b634a /tcg/sparc/tcg-target.c | |
| parent | tcg-sparc: Implement division properly. (diff) | |
| download | qemu-cc6dfecf02eadbdc14100dff54aec4df0c139393.tar.gz qemu-cc6dfecf02eadbdc14100dff54aec4df0c139393.tar.xz qemu-cc6dfecf02eadbdc14100dff54aec4df0c139393.zip | |
tcg-sparc: Implement ext32[su]_i64
The 32-bit right-shift instructions is defined to extend the shifted
output to 64-bits. A shift count of zero therefore is a simple
extension without actually shifting.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'tcg/sparc/tcg-target.c')
| -rw-r--r-- | tcg/sparc/tcg-target.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c index f6262d0f30..dd7a598bc8 100644 --- a/tcg/sparc/tcg-target.c +++ b/tcg/sparc/tcg-target.c @@ -1238,6 +1238,20 @@ static inline void tcg_out_op(TCGContext *s, int opc, const TCGArg *args, ARITH_MULX); tcg_out_arith(s, args[0], args[1], TCG_REG_I5, ARITH_SUB); break; + case INDEX_op_ext32s_i64: + if (const_args[1]) { + tcg_out_movi(s, TCG_TYPE_I64, args[0], (int32_t)args[1]); + } else { + tcg_out_arithi(s, args[0], args[1], 0, SHIFT_SRA); + } + break; + case INDEX_op_ext32u_i64: + if (const_args[1]) { + tcg_out_movi_imm32(s, args[0], args[1]); + } else { + tcg_out_arithi(s, args[0], args[1], 0, SHIFT_SRL); + } + break; case INDEX_op_brcond_i64: tcg_out_brcond_i64(s, args[2], args[0], args[1], const_args[1], @@ -1344,6 +1358,8 @@ static const TCGTargetOpDef sparc_op_defs[] = { { INDEX_op_shl_i64, { "r", "r", "rJ" } }, { INDEX_op_shr_i64, { "r", "r", "rJ" } }, { INDEX_op_sar_i64, { "r", "r", "rJ" } }, + { INDEX_op_ext32s_i64, { "r", "ri" } }, + { INDEX_op_ext32u_i64, { "r", "ri" } }, { INDEX_op_brcond_i64, { "r", "rJ" } }, #endif |