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| author | Richard Henderson | 2020-09-04 00:19:03 +0200 |
|---|---|---|
| committer | Richard Henderson | 2020-10-08 12:57:32 +0200 |
| commit | 9be0d08019465b38e2f1a605960961a491430c21 (patch) | |
| tree | 1872fa73f3c6ac908d924141f0359dd32e441ade /tcg/sparc | |
| parent | tcg: Adjust simd_desc size encoding (diff) | |
| download | qemu-9be0d08019465b38e2f1a605960961a491430c21.tar.gz qemu-9be0d08019465b38e2f1a605960961a491430c21.tar.xz qemu-9be0d08019465b38e2f1a605960961a491430c21.zip | |
tcg: Drop union from TCGArgConstraint
The union is unused; let "regs" appear in the main structure
without the "u.regs" wrapping.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/sparc')
| -rw-r--r-- | tcg/sparc/tcg-target.c.inc | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/tcg/sparc/tcg-target.c.inc b/tcg/sparc/tcg-target.c.inc index 40bc12290c..e2de749af7 100644 --- a/tcg/sparc/tcg-target.c.inc +++ b/tcg/sparc/tcg-target.c.inc @@ -326,27 +326,27 @@ static const char *target_parse_constraint(TCGArgConstraint *ct, switch (*ct_str++) { case 'r': ct->ct |= TCG_CT_REG; - ct->u.regs = 0xffffffff; + ct->regs = 0xffffffff; break; case 'R': ct->ct |= TCG_CT_REG; - ct->u.regs = ALL_64; + ct->regs = ALL_64; break; case 'A': /* qemu_ld/st address constraint */ ct->ct |= TCG_CT_REG; - ct->u.regs = TARGET_LONG_BITS == 64 ? ALL_64 : 0xffffffff; + ct->regs = TARGET_LONG_BITS == 64 ? ALL_64 : 0xffffffff; reserve_helpers: - tcg_regset_reset_reg(ct->u.regs, TCG_REG_O0); - tcg_regset_reset_reg(ct->u.regs, TCG_REG_O1); - tcg_regset_reset_reg(ct->u.regs, TCG_REG_O2); + tcg_regset_reset_reg(ct->regs, TCG_REG_O0); + tcg_regset_reset_reg(ct->regs, TCG_REG_O1); + tcg_regset_reset_reg(ct->regs, TCG_REG_O2); break; case 's': /* qemu_st data 32-bit constraint */ ct->ct |= TCG_CT_REG; - ct->u.regs = 0xffffffff; + ct->regs = 0xffffffff; goto reserve_helpers; case 'S': /* qemu_st data 64-bit constraint */ ct->ct |= TCG_CT_REG; - ct->u.regs = ALL_64; + ct->regs = ALL_64; goto reserve_helpers; case 'I': ct->ct |= TCG_CT_CONST_S11; |