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author | Richard Henderson | 2019-04-30 22:01:12 +0200 |
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committer | Richard Henderson | 2019-05-22 21:09:43 +0200 |
commit | f75da2988eb2457fa23d006d573220c5c680ec4e (patch) | |
tree | b6192d1d40e1627a67a6dfc6f205ea5dfb1edd81 /tcg/tcg-op.h | |
parent | tcg: Add support for vector bitwise select (diff) | |
download | qemu-f75da2988eb2457fa23d006d573220c5c680ec4e.tar.gz qemu-f75da2988eb2457fa23d006d573220c5c680ec4e.tar.xz qemu-f75da2988eb2457fa23d006d573220c5c680ec4e.zip |
tcg: Add support for vector compare select
Perform a per-element conditional move. This combination operation is
easier to implement on some host vector units than plain cmp+bitsel.
Omit the usual gvec interface, as this is intended to be used by
target-specific gvec expansion call-backs.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/tcg-op.h')
-rw-r--r-- | tcg/tcg-op.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h index 268860ed2f..2d4dd5cd7d 100644 --- a/tcg/tcg-op.h +++ b/tcg/tcg-op.h @@ -1002,6 +1002,8 @@ void tcg_gen_cmp_vec(TCGCond cond, unsigned vece, TCGv_vec r, void tcg_gen_bitsel_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b, TCGv_vec c); +void tcg_gen_cmpsel_vec(TCGCond cond, unsigned vece, TCGv_vec r, + TCGv_vec a, TCGv_vec b, TCGv_vec c, TCGv_vec d); void tcg_gen_ld_vec(TCGv_vec r, TCGv_ptr base, TCGArg offset); void tcg_gen_st_vec(TCGv_vec r, TCGv_ptr base, TCGArg offset); |