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| author | Peter Maydell | 2017-06-22 11:25:03 +0200 |
|---|---|---|
| committer | Peter Maydell | 2017-06-22 11:25:03 +0200 |
| commit | db7a99cdc1d0f4d8cbf7c41ce9e570dce04f0a11 (patch) | |
| tree | 47fd7ac1842e033dc163ed63788bc818af0d5a7e /tcg/tcg-runtime.c | |
| parent | tcg/tci: fix tcg-interpreter build (diff) | |
| parent | target/arm: Exit after clearing aarch64 interrupt mask (diff) | |
| download | qemu-db7a99cdc1d0f4d8cbf7c41ce9e570dce04f0a11.tar.gz qemu-db7a99cdc1d0f4d8cbf7c41ce9e570dce04f0a11.tar.xz qemu-db7a99cdc1d0f4d8cbf7c41ce9e570dce04f0a11.zip | |
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20170619' into staging
Queued TCG patches
# gpg: Signature made Mon 19 Jun 2017 19:12:06 BST
# gpg: using RSA key 0xAD1270CC4DD0279B
# gpg: Good signature from "Richard Henderson <rth7680@gmail.com>"
# gpg: aka "Richard Henderson <rth@redhat.com>"
# gpg: aka "Richard Henderson <rth@twiddle.net>"
# Primary key fingerprint: 9CB1 8DDA F8E8 49AD 2AFC 16A4 AD12 70CC 4DD0 279B
* remotes/rth/tags/pull-tcg-20170619:
target/arm: Exit after clearing aarch64 interrupt mask
target/s390x: Exit after changing PSW mask
target/alpha: Use tcg_gen_lookup_and_goto_ptr
tcg: Increase hit rate of lookup_tb_ptr
tcg/arm: Use ldr (literal) for goto_tb
tcg/arm: Try pc-relative addresses for movi
tcg/arm: Remove limit on code buffer size
tcg/arm: Use indirect branch for goto_tb
tcg/aarch64: Use ADR in tcg_out_movi
translate-all: consolidate tb init in tb_gen_code
tcg: allocate TB structs before the corresponding translated code
util: add cacheinfo
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'tcg/tcg-runtime.c')
| -rw-r--r-- | tcg/tcg-runtime.c | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/tcg/tcg-runtime.c b/tcg/tcg-runtime.c index 7fa90ce508..ec3a34e461 100644 --- a/tcg/tcg-runtime.c +++ b/tcg/tcg-runtime.c @@ -149,23 +149,23 @@ void *HELPER(lookup_tb_ptr)(CPUArchState *env, target_ulong addr) CPUState *cpu = ENV_GET_CPU(env); TranslationBlock *tb; target_ulong cs_base, pc; - uint32_t flags; - - tb = atomic_rcu_read(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(addr)]); - if (likely(tb)) { - cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags); - if (likely(tb->pc == addr && tb->cs_base == cs_base && - tb->flags == flags)) { - goto found; - } + uint32_t flags, addr_hash; + + addr_hash = tb_jmp_cache_hash_func(addr); + tb = atomic_rcu_read(&cpu->tb_jmp_cache[addr_hash]); + cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags); + + if (unlikely(!(tb + && tb->pc == addr + && tb->cs_base == cs_base + && tb->flags == flags))) { tb = tb_htable_lookup(cpu, addr, cs_base, flags); - if (likely(tb)) { - atomic_set(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(addr)], tb); - goto found; + if (!tb) { + return tcg_ctx.code_gen_epilogue; } + atomic_set(&cpu->tb_jmp_cache[addr_hash], tb); } - return tcg_ctx.code_gen_epilogue; - found: + qemu_log_mask_and_addr(CPU_LOG_EXEC, addr, "Chain %p [%d: " TARGET_FMT_lx "] %s\n", tb->tc_ptr, cpu->cpu_index, addr, |