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| author | Richard Henderson | 2021-01-28 07:17:49 +0100 |
|---|---|---|
| committer | Richard Henderson | 2021-02-05 21:24:14 +0100 |
| commit | 7abd007cbc145c1f3745c6b1ca0deea2ef5c8591 (patch) | |
| tree | 76ea7ec6ae72597795327dc928aa2ec737f55d1f /tcg/tci.c | |
| parent | tcg/tci: Use g_assert_not_reached (diff) | |
| download | qemu-7abd007cbc145c1f3745c6b1ca0deea2ef5c8591.tar.gz qemu-7abd007cbc145c1f3745c6b1ca0deea2ef5c8591.tar.xz qemu-7abd007cbc145c1f3745c6b1ca0deea2ef5c8591.zip | |
tcg/tci: Remove dead code for TCG_TARGET_HAS_div2_*
We do not simultaneously support div and div2 -- it's one
or the other. TCI is already using div, so remove div2.
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/tci.c')
| -rw-r--r-- | tcg/tci.c | 12 |
1 files changed, 0 insertions, 12 deletions
@@ -652,7 +652,6 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, t2 = tci_read_ri32(regs, &tb_ptr); tci_write_reg(regs, t0, t1 * t2); break; -#if TCG_TARGET_HAS_div_i32 case INDEX_op_div_i32: t0 = *tb_ptr++; t1 = tci_read_ri32(regs, &tb_ptr); @@ -677,12 +676,6 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, t2 = tci_read_ri32(regs, &tb_ptr); tci_write_reg(regs, t0, t1 % t2); break; -#elif TCG_TARGET_HAS_div2_i32 - case INDEX_op_div2_i32: - case INDEX_op_divu2_i32: - TODO(); - break; -#endif case INDEX_op_and_i32: t0 = *tb_ptr++; t1 = tci_read_ri32(regs, &tb_ptr); @@ -908,11 +901,6 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, case INDEX_op_remu_i64: TODO(); break; -#elif TCG_TARGET_HAS_div2_i64 - case INDEX_op_div2_i64: - case INDEX_op_divu2_i64: - TODO(); - break; #endif case INDEX_op_and_i64: t0 = *tb_ptr++; |