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author | Richard Henderson | 2022-02-26 02:44:55 +0100 |
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committer | Richard Henderson | 2022-02-28 19:04:10 +0100 |
commit | 2ccf40f00e3f29d85d4ff48a9a98870059002290 (patch) | |
tree | 32d9d708900e730ef0ba46358ef94b171c02b105 /tcg/tci/tcg-target.c.inc | |
parent | accel/tcg/cpu-exec: Fix precise single-stepping after interrupt (diff) | |
download | qemu-2ccf40f00e3f29d85d4ff48a9a98870059002290.tar.gz qemu-2ccf40f00e3f29d85d4ff48a9a98870059002290.tar.xz qemu-2ccf40f00e3f29d85d4ff48a9a98870059002290.zip |
tcg/tci: Use tcg_out_ldst in tcg_out_st
The tcg_out_ldst helper will handle out-of-range offsets.
We haven't actually encountered any, since we haven't run
across the assert within tcg_out_op_rrs, but an out-of-range
offset would not be impossible in future.
Fixes: 65089889183 ("tcg/tci: Change encoding to uint32_t units")
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/tci/tcg-target.c.inc')
-rw-r--r-- | tcg/tci/tcg-target.c.inc | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index 0cb16aaa81..9ff1fa0832 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -790,14 +790,13 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, static void tcg_out_st(TCGContext *s, TCGType type, TCGReg val, TCGReg base, intptr_t offset) { - stack_bounds_check(base, offset); switch (type) { case TCG_TYPE_I32: - tcg_out_op_rrs(s, INDEX_op_st_i32, val, base, offset); + tcg_out_ldst(s, INDEX_op_st_i32, val, base, offset); break; #if TCG_TARGET_REG_BITS == 64 case TCG_TYPE_I64: - tcg_out_op_rrs(s, INDEX_op_st_i64, val, base, offset); + tcg_out_ldst(s, INDEX_op_st_i64, val, base, offset); break; #endif default: |