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author | Richard Henderson | 2021-01-31 20:16:45 +0100 |
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committer | Richard Henderson | 2021-03-17 14:24:44 +0100 |
commit | 00e338faa0cc26c861e2d7b1b5116f2c76574045 (patch) | |
tree | c59c5231c24cc0a9ebb1c0aeef1c92b474c32e37 /tcg/tci | |
parent | tcg/tci: Clean up deposit operations (diff) | |
download | qemu-00e338faa0cc26c861e2d7b1b5116f2c76574045.tar.gz qemu-00e338faa0cc26c861e2d7b1b5116f2c76574045.tar.xz qemu-00e338faa0cc26c861e2d7b1b5116f2c76574045.zip |
tcg/tci: Reduce qemu_ld/st TCGMemOpIdx operand to 32-bits
We are currently using the "natural" size routine, which
uses 64-bits on a 64-bit host. The TCGMemOpIdx operand
has 11 bits, so we can safely reduce to 32-bits.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/tci')
-rw-r--r-- | tcg/tci/tcg-target.c.inc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index 640407b4a8..6c187a25cc 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -550,7 +550,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, if (TARGET_LONG_BITS > TCG_TARGET_REG_BITS) { tcg_out_r(s, *args++); } - tcg_out_i(s, *args++); + tcg_out32(s, *args++); break; case INDEX_op_qemu_ld_i64: @@ -563,7 +563,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, if (TARGET_LONG_BITS > TCG_TARGET_REG_BITS) { tcg_out_r(s, *args++); } - tcg_out_i(s, *args++); + tcg_out32(s, *args++); break; case INDEX_op_mb: |