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| author | Richard Henderson | 2022-06-02 03:04:30 +0200 |
|---|---|---|
| committer | Richard Henderson | 2022-06-02 17:09:46 +0200 |
| commit | 94bcc91b2e95e02ec57ed18d5a5e7cb75aa19a50 (patch) | |
| tree | 8dbd2d6c29eb9c2e9250394b7100abf3e3e0a81a /tcg | |
| parent | tcg/i386: Fix encoding of OPC_VPSRAQ for INDEX_op_sars_vec (diff) | |
| download | qemu-94bcc91b2e95e02ec57ed18d5a5e7cb75aa19a50.tar.gz qemu-94bcc91b2e95e02ec57ed18d5a5e7cb75aa19a50.tar.xz qemu-94bcc91b2e95e02ec57ed18d5a5e7cb75aa19a50.zip | |
tcg/aarch64: Fix illegal insn from out-of-range shli
The masking in tcg_out_shl was incorrect, producing an
illegal instruction, rather than merely unspecified results
for the out-of-range shift.
Tested-by: Joel Stanley <joel@jms.id.au>
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1051
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg')
| -rw-r--r-- | tcg/aarch64/tcg-target.c.inc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc index 61e284bb5c..d997f7922a 100644 --- a/tcg/aarch64/tcg-target.c.inc +++ b/tcg/aarch64/tcg-target.c.inc @@ -1261,7 +1261,7 @@ static inline void tcg_out_shl(TCGContext *s, TCGType ext, { int bits = ext ? 64 : 32; int max = bits - 1; - tcg_out_ubfm(s, ext, rd, rn, bits - (m & max), max - (m & max)); + tcg_out_ubfm(s, ext, rd, rn, (bits - m) & max, (max - m) & max); } static inline void tcg_out_shr(TCGContext *s, TCGType ext, |