summaryrefslogtreecommitdiffstats
path: root/tests/tcg/mips/mips32-dsp/shilov.c
diff options
context:
space:
mode:
authorJia Liu2012-10-24 16:17:13 +0200
committerAurelien Jarno2012-10-31 21:37:21 +0100
commitd70080c4e37fc533fa10904b286f29449decc6f8 (patch)
treee36bed089aa0fd67cb9c17bbff0a0f4aaa148f3f /tests/tcg/mips/mips32-dsp/shilov.c
parenttarget-mips: Add ASE DSP processors (diff)
downloadqemu-d70080c4e37fc533fa10904b286f29449decc6f8.tar.gz
qemu-d70080c4e37fc533fa10904b286f29449decc6f8.tar.xz
qemu-d70080c4e37fc533fa10904b286f29449decc6f8.zip
target-mips: Add ASE DSP testcases
Add MIPS ASE DSP testcases. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'tests/tcg/mips/mips32-dsp/shilov.c')
-rw-r--r--tests/tcg/mips/mips32-dsp/shilov.c29
1 files changed, 29 insertions, 0 deletions
diff --git a/tests/tcg/mips/mips32-dsp/shilov.c b/tests/tcg/mips/mips32-dsp/shilov.c
new file mode 100644
index 0000000000..f186032a14
--- /dev/null
+++ b/tests/tcg/mips/mips32-dsp/shilov.c
@@ -0,0 +1,29 @@
+#include<stdio.h>
+#include<assert.h>
+
+int main()
+{
+ int rs, ach, acl;
+ int resulth, resultl;
+
+ rs = 0x0F;
+ ach = 0xBBAACCFF;
+ acl = 0x1C3B001D;
+
+ resulth = 0x17755;
+ resultl = 0x99fe3876;
+
+ __asm
+ ("mthi %0, $ac1\n\t"
+ "mtlo %1, $ac1\n\t"
+ "shilov $ac1, %2\n\t"
+ "mfhi %0, $ac1\n\t"
+ "mflo %1, $ac1\n\t"
+ : "+r"(ach), "+r"(acl)
+ : "r"(rs)
+ );
+ assert(ach == resulth);
+ assert(acl == resultl);
+
+ return 0;
+}