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authorJia Liu2012-10-24 16:17:13 +0200
committerAurelien Jarno2012-10-31 21:37:21 +0100
commitd70080c4e37fc533fa10904b286f29449decc6f8 (patch)
treee36bed089aa0fd67cb9c17bbff0a0f4aaa148f3f /tests/tcg/mips/mips64-dsp/shra_pw.c
parenttarget-mips: Add ASE DSP processors (diff)
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target-mips: Add ASE DSP testcases
Add MIPS ASE DSP testcases. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'tests/tcg/mips/mips64-dsp/shra_pw.c')
-rw-r--r--tests/tcg/mips/mips64-dsp/shra_pw.c36
1 files changed, 36 insertions, 0 deletions
diff --git a/tests/tcg/mips/mips64-dsp/shra_pw.c b/tests/tcg/mips/mips64-dsp/shra_pw.c
new file mode 100644
index 0000000000..33b1b8fe72
--- /dev/null
+++ b/tests/tcg/mips/mips64-dsp/shra_pw.c
@@ -0,0 +1,36 @@
+#include "io.h"
+
+int main(void)
+{
+ long long rd, rt;
+ long long res;
+
+ rt = 0x1234567887654321;
+ res = 0x01234567f8765432;
+
+ __asm
+ ("shra.pw %0, %1, 0x4"
+ : "=r"(rd)
+ : "r"(rt)
+ );
+
+ if (rd != res) {
+ printf("shra.pw error\n");
+ return -1;
+ }
+
+ rt = 0x1234567887654321;
+ res = 0x1234567887654321;
+
+ __asm
+ ("shra.pw %0, %1, 0x0"
+ : "=r"(rd)
+ : "r"(rt)
+ );
+
+ if (rd != res) {
+ printf("shra.pw error\n");
+ return -1;
+ }
+ return 0;
+}