diff options
| author | Jia Liu | 2012-10-24 16:17:13 +0200 |
|---|---|---|
| committer | Aurelien Jarno | 2012-10-31 21:37:21 +0100 |
| commit | d70080c4e37fc533fa10904b286f29449decc6f8 (patch) | |
| tree | e36bed089aa0fd67cb9c17bbff0a0f4aaa148f3f /tests/tcg/mips/mips64-dspr2/cmpgdu_lt_qb.c | |
| parent | target-mips: Add ASE DSP processors (diff) | |
| download | qemu-d70080c4e37fc533fa10904b286f29449decc6f8.tar.gz qemu-d70080c4e37fc533fa10904b286f29449decc6f8.tar.xz qemu-d70080c4e37fc533fa10904b286f29449decc6f8.zip | |
target-mips: Add ASE DSP testcases
Add MIPS ASE DSP testcases.
Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'tests/tcg/mips/mips64-dspr2/cmpgdu_lt_qb.c')
| -rw-r--r-- | tests/tcg/mips/mips64-dspr2/cmpgdu_lt_qb.c | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/tests/tcg/mips/mips64-dspr2/cmpgdu_lt_qb.c b/tests/tcg/mips/mips64-dspr2/cmpgdu_lt_qb.c new file mode 100644 index 0000000000..a71e4e307f --- /dev/null +++ b/tests/tcg/mips/mips64-dspr2/cmpgdu_lt_qb.c @@ -0,0 +1,48 @@ +#include"io.h" + +int main(void) +{ + long long rd, rs, rt; + long long dsp; + long long result; + + rs = 0x11777066; + rt = 0x55AA70FF; + result = 0x0D; + __asm + ("cmpgdu.lt.qb %0, %2, %3\n\t" + "rddsp %1\n\t" + : "=r"(rd), "=r"(dsp) + : "r"(rs), "r"(rt) + ); + dsp = (dsp >> 24) & 0x0F; + if (rd != result) { + printf("cmpgdu.lt.qb error\n"); + return -1; + } + if (dsp != result) { + printf("cmpgdu.lt.qb error\n"); + return -1; + } + + rs = 0x11777066; + rt = 0x11777066; + result = 0x00; + __asm + ("cmpgdu.lt.qb %0, %2, %3\n\t" + "rddsp %1\n\t" + : "=r"(rd), "=r"(dsp) + : "r"(rs), "r"(rt) + ); + dsp = (dsp >> 24) & 0x0F; + if (rd != result) { + printf("cmpgdu.lt.qb error\n"); + return -1; + } + if (dsp != result) { + printf("cmpgdu.lt.qb error\n"); + return -1; + } + + return 0; +} |