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author | Jia Liu | 2012-10-24 16:17:13 +0200 |
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committer | Aurelien Jarno | 2012-10-31 21:37:21 +0100 |
commit | d70080c4e37fc533fa10904b286f29449decc6f8 (patch) | |
tree | e36bed089aa0fd67cb9c17bbff0a0f4aaa148f3f /tests/tcg/mips/mips64-dspr2/shrav_r_ob.c | |
parent | target-mips: Add ASE DSP processors (diff) | |
download | qemu-d70080c4e37fc533fa10904b286f29449decc6f8.tar.gz qemu-d70080c4e37fc533fa10904b286f29449decc6f8.tar.xz qemu-d70080c4e37fc533fa10904b286f29449decc6f8.zip |
target-mips: Add ASE DSP testcases
Add MIPS ASE DSP testcases.
Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'tests/tcg/mips/mips64-dspr2/shrav_r_ob.c')
-rw-r--r-- | tests/tcg/mips/mips64-dspr2/shrav_r_ob.c | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/tests/tcg/mips/mips64-dspr2/shrav_r_ob.c b/tests/tcg/mips/mips64-dspr2/shrav_r_ob.c new file mode 100644 index 0000000000..b80100a7c2 --- /dev/null +++ b/tests/tcg/mips/mips64-dspr2/shrav_r_ob.c @@ -0,0 +1,22 @@ +#include "io.h" + +int main(void) +{ + long long rd, rt, rs; + long long res; + + rt = 0x1234567887654321; + rs = 0x4; + res = 0xe3e7ebf0f1ede9e5; + + asm ("shrav_r.ob %0, %1, %2" + : "=r"(rd) + : "r"(rt), "r"(rs) + ); + + if (rd != res) { + printf("shra_r.ob error\n"); + return -1; + } + return 0; +} |