diff options
| author | Max Filippov | 2022-04-26 05:05:18 +0200 |
|---|---|---|
| committer | Max Filippov | 2022-05-07 00:27:40 +0200 |
| commit | 703cebcfac65356aa2b19c0a5e4aa1b4be23a328 (patch) | |
| tree | 8c3036c01e992176325412eda62a905613d6ba14 /tests/tcg/xtensa/test_phys_mem.S | |
| parent | tests/tcg/xtensa: remove dependency on the loop option (diff) | |
| download | qemu-703cebcfac65356aa2b19c0a5e4aa1b4be23a328.tar.gz qemu-703cebcfac65356aa2b19c0a5e4aa1b4be23a328.tar.xz qemu-703cebcfac65356aa2b19c0a5e4aa1b4be23a328.zip | |
tests/tcg/xtensa: enable autorefill phys_mem tests for MMUv3
Autorefill tests in the phys_mem test suite are disabled for cores that
have spanning TLB way, i.e. for all MMUv3 cores. Instead of disabling it
invalidate TLB mappings for entries that conflict with the test.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'tests/tcg/xtensa/test_phys_mem.S')
| -rw-r--r-- | tests/tcg/xtensa/test_phys_mem.S | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/tests/tcg/xtensa/test_phys_mem.S b/tests/tcg/xtensa/test_phys_mem.S index 9bb3ee3866..f935a70294 100644 --- a/tests/tcg/xtensa/test_phys_mem.S +++ b/tests/tcg/xtensa/test_phys_mem.S @@ -2,7 +2,7 @@ test_suite phys_mem -#if XCHAL_HAVE_PTP_MMU && !XCHAL_HAVE_SPANNING_WAY +#if XCHAL_HAVE_PTP_MMU .purgem test_init @@ -13,6 +13,14 @@ test_suite phys_mem witlb a2, a3 movi a2, 0xc0000000 wsr a2, ptevaddr +#if XCHAL_HAVE_SPANNING_WAY + movi a2, 0xc0000000 | XCHAL_SPANNING_WAY + idtlb a2 + iitlb a2 + movi a2, 0x20000000 | XCHAL_SPANNING_WAY + idtlb a2 + iitlb a2 +#endif .endm test inst_fetch_get_pte_no_phys |