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author | Fredrik Noring | 2018-10-21 17:41:47 +0200 |
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committer | Aleksandar Markovic | 2018-10-24 15:20:31 +0200 |
commit | 3303f017adb4b4a10f907552995973a26d128a8d (patch) | |
tree | ab32291a1658cbe28862d5b2ce776440ad838f07 /tests/tcg | |
parent | tests/tcg/mips: Add tests for R5900 three-operand MULTU1 (diff) | |
download | qemu-3303f017adb4b4a10f907552995973a26d128a8d.tar.gz qemu-3303f017adb4b4a10f907552995973a26d128a8d.tar.xz qemu-3303f017adb4b4a10f907552995973a26d128a8d.zip |
tests/tcg/mips: Add tests for R5900 MFLO1 and MFHI1
Add a test for MFLO1 and MFHI1.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Fredrik Noring <noring@nocrew.org>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Diffstat (limited to 'tests/tcg')
-rw-r--r-- | tests/tcg/mips/mipsr5900/Makefile | 3 | ||||
-rw-r--r-- | tests/tcg/mips/mipsr5900/mflohi1.c | 35 |
2 files changed, 37 insertions, 1 deletions
diff --git a/tests/tcg/mips/mipsr5900/Makefile b/tests/tcg/mips/mipsr5900/Makefile index b3ddb9a7bf..fd8ee6b0e3 100644 --- a/tests/tcg/mips/mipsr5900/Makefile +++ b/tests/tcg/mips/mipsr5900/Makefile @@ -8,7 +8,8 @@ SIM_FLAGS=-cpu R5900 CC = $(CROSS)gcc CFLAGS = -Wall -mabi=32 -march=r5900 -static -TESTCASES = mult.tst +TESTCASES = mflohi1.tst +TESTCASES += mult.tst TESTCASES += multu.tst all: $(TESTCASES) diff --git a/tests/tcg/mips/mipsr5900/mflohi1.c b/tests/tcg/mips/mipsr5900/mflohi1.c new file mode 100644 index 0000000000..eed3683dc5 --- /dev/null +++ b/tests/tcg/mips/mipsr5900/mflohi1.c @@ -0,0 +1,35 @@ +/* + * Test R5900-specific MFLO1 and MFHI1. + */ + +#include <stdio.h> +#include <inttypes.h> +#include <assert.h> + +int main() +{ + int32_t rs = 12207031, rt = 305175781; + int32_t rs1 = 32452867, rt1 = 49979687; + int64_t lo, hi, lo1, hi1; + int64_t r, r1; + + /* Test both LO/HI and LO1/HI1 to verify separation. */ + __asm__ __volatile__ ( + " mult $0, %4, %5\n" + " mult1 $0, %6, %7\n" + " mflo %0\n" + " mfhi %1\n" + " mflo1 %2\n" + " mfhi1 %3\n" + : "=r" (lo), "=r" (hi), + "=r" (lo1), "=r" (hi1) + : "r" (rs), "r" (rt), + "r" (rs1), "r" (rt1)); + r = ((int64_t)hi << 32) | (uint32_t)lo; + r1 = ((int64_t)hi1 << 32) | (uint32_t)lo1; + + assert(r == 3725290219116211); + assert(r1 == 1621984134912629); + + return 0; +} |