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authorAlex Bennée2021-01-08 23:42:46 +0100
committerAlex Bennée2021-01-18 11:05:06 +0100
commit797920b952ea154a73049d171f5d5e3d6fb0bbea (patch)
tree2f1793de78d405e27dc8eedccaf28c110969281d /tests/tcg
parentgdbstub: ensure we clean-up when terminated (diff)
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target/arm: use official org.gnu.gdb.aarch64.sve layout for registers
While GDB can work with any XML description given to it there is special handling for SVE registers on the GDB side which makes the users life a little better. The changes aren't that major and all the registers save the $vg reported the same. All that changes is: - report org.gnu.gdb.aarch64.sve - use gdb nomenclature for names and types - minor re-ordering of the types to match reference - re-enable ieee_half (as we know gdb supports it now) - $vg is now a 64 bit int - check $vN and $zN aliasing in test Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Luis Machado <luis.machado@linaro.org> Message-Id: <20210108224256.2321-11-alex.bennee@linaro.org>
Diffstat (limited to 'tests/tcg')
-rw-r--r--tests/tcg/aarch64/gdbstub/test-sve-ioctl.py11
1 files changed, 11 insertions, 0 deletions
diff --git a/tests/tcg/aarch64/gdbstub/test-sve-ioctl.py b/tests/tcg/aarch64/gdbstub/test-sve-ioctl.py
index 972cf73c31..b9ef169c1a 100644
--- a/tests/tcg/aarch64/gdbstub/test-sve-ioctl.py
+++ b/tests/tcg/aarch64/gdbstub/test-sve-ioctl.py
@@ -40,6 +40,17 @@ class TestBreakpoint(gdb.Breakpoint):
except gdb.error:
report(False, "checking zregs (out of range)")
+ # Check the aliased V registers are set and GDB has correctly
+ # created them for us having recognised and handled SVE.
+ try:
+ for i in range(0, 16):
+ val_z = gdb.parse_and_eval("$z0.b.u[%d]" % i)
+ val_v = gdb.parse_and_eval("$v0.b.u[%d]" % i)
+ report(int(val_z) == int(val_v),
+ "v0.b.u[%d] == z0.b.u[%d]" % (i, i))
+ except gdb.error:
+ report(False, "checking vregs (out of range)")
+
def run_test():
"Run through the tests one by one"