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authorTaylor Simpson2021-06-02 01:19:42 +0200
committerTaylor Simpson2021-06-29 18:32:50 +0200
commita5a8d98c8537f022a14bdc70eff12e296431b80f (patch)
tree759129c7276b82b3e42b54a078c552366d4b7478 /tests/tcg
parentHexagon (target/hexagon) fix bug in fLSBNEW* (diff)
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Hexagon (target/hexagon) fix l2fetch instructions
Y4_l2fetch == l2fetch(Rs32, Rt32) Y5_l2fetch == l2fetch(Rs32, Rtt32) The semantics for these instructions are present, but the encodings are missing. Note that these are treated as nops in qemu, so we add overrides. Test case added to tests/tcg/hexagon/misc.c Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <1622589584-22571-3-git-send-email-tsimpson@quicinc.com>
Diffstat (limited to 'tests/tcg')
-rw-r--r--tests/tcg/hexagon/misc.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/tests/tcg/hexagon/misc.c b/tests/tcg/hexagon/misc.c
index 9e139f3e85..f0b1947fb3 100644
--- a/tests/tcg/hexagon/misc.c
+++ b/tests/tcg/hexagon/misc.c
@@ -326,6 +326,13 @@ void test_lsbnew(void)
check(result, 5);
}
+void test_l2fetch(void)
+{
+ /* These don't do anything in qemu, just make sure they don't assert */
+ asm volatile ("l2fetch(r0, r1)\n\t"
+ "l2fetch(r0, r3:2)\n\t");
+}
+
int main()
{
int res;
@@ -459,6 +466,8 @@ int main()
test_lsbnew();
+ test_l2fetch();
+
puts(err ? "FAIL" : "PASS");
return err;
}