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authorCédric Le Goater2018-01-15 19:04:02 +0100
committerDavid Gibson2018-01-16 23:35:24 +0100
commit09279d7e7b08ebfaaa40060843dbc8f33977548f (patch)
tree32f5d6eae09c2ed7607e72aa3181d090a65ea683 /tests
parentppc/pnv: use POWER9 DD2 processor (diff)
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ppc/pnv: change core mask for POWER9
When addressed by XSCOM, the first core has the 0x20 chiplet ID but the CPU PIR can start at 0x0. Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'tests')
-rw-r--r--tests/pnv-xscom-test.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/tests/pnv-xscom-test.c b/tests/pnv-xscom-test.c
index a1a119c091..9d545c4718 100644
--- a/tests/pnv-xscom-test.c
+++ b/tests/pnv-xscom-test.c
@@ -49,7 +49,7 @@ static const PnvChip pnv_chips[] = {
.xscom_base = 0x000603fc00000000ull,
.xscom_core_base = 0x0ull,
.cfam_id = 0x220d104900008000ull,
- .first_core = 0x20,
+ .first_core = 0x0,
},
#endif
};