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authorPeter Maydell2021-03-12 12:30:55 +0100
committerPeter Maydell2021-03-12 12:30:55 +0100
commit1941858448e76f83eb00614c4f34ac29e9a8e792 (patch)
tree4d3bafbd64a5b337d56beb28a1fcd28bd9cc3001 /tests
parentMerge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6.0-pul... (diff)
parentspapr.c: send QAPI event when memory hotunplug fails (diff)
downloadqemu-1941858448e76f83eb00614c4f34ac29e9a8e792.tar.gz
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Merge remote-tracking branch 'remotes/dg-gitlab/tags/ppc-for-6.0-20210310' into staging
ppc patch queue for 2021-03-10 Next batch of patches for the ppc target and machine types. Includes: * Several cleanups for sm501 from Peter Maydell * An update to the SLOF guest firmware * Improved handling of hotplug failures in spapr, associated cleanups to the hotplug handling code * Several etsec fixes and cleanups from Bin Meng * Assorted other fixes and cleanups # gpg: Signature made Wed 10 Mar 2021 04:08:53 GMT # gpg: using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" [full] # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" [full] # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" [full] # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" [unknown] # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dg-gitlab/tags/ppc-for-6.0-20210310: spapr.c: send QAPI event when memory hotunplug fails spapr.c: remove duplicated assert in spapr_memory_unplug_request() target/ppc: fix icount support on Book-e vms accessing SPRs qemu_timer.c: add timer_deadline_ms() helper spapr_pci.c: add 'unplug already in progress' message for PCI unplug spapr.c: add 'unplug already in progress' message for PHB unplug hw/ppc: e500: Add missing <ranges> in the eTSEC node hw/net: fsl_etsec: Fix build error when HEX_DUMP is on spapr_drc.c: use DRC reconfiguration to cleanup DIMM unplug state spapr_drc.c: add hotunplug timeout for CPUs spapr_drc.c: introduce unplug_timeout_timer target/ppc: Fix bcdsub. emulation when result overflows docs/system: Extend PPC section spapr: rename spapr_drc_detach() to spapr_drc_unplug_request() spapr_drc.c: use spapr_drc_release() in isolate_physical/set_unusable pseries: Update SLOF firmware image spapr_drc.c: do not call spapr_drc_detach() in drc_isolate_logical() hw/display/sm501: Inline template header into C file hw/display/sm501: Expand out macros in template header hw/display/sm501: Remove dead code for non-32-bit RGB surfaces Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'tests')
-rwxr-xr-xtests/tcg/configure.sh6
-rw-r--r--tests/tcg/ppc64/Makefile.target13
-rw-r--r--tests/tcg/ppc64le/Makefile.target12
-rw-r--r--tests/tcg/ppc64le/bcdsub.c130
4 files changed, 161 insertions, 0 deletions
diff --git a/tests/tcg/configure.sh b/tests/tcg/configure.sh
index 36b8a73a54..ce304f4933 100755
--- a/tests/tcg/configure.sh
+++ b/tests/tcg/configure.sh
@@ -251,6 +251,12 @@ for target in $target_list; do
echo "CROSS_CC_HAS_ARMV8_MTE=y" >> $config_target_mak
fi
;;
+ ppc*)
+ if do_compiler "$target_compiler" $target_compiler_cflags \
+ -mpower8-vector -o $TMPE $TMPC; then
+ echo "CROSS_CC_HAS_POWER8_VECTOR=y" >> $config_target_mak
+ fi
+ ;;
esac
enabled_cross_compilers="$enabled_cross_compilers $target_compiler"
diff --git a/tests/tcg/ppc64/Makefile.target b/tests/tcg/ppc64/Makefile.target
new file mode 100644
index 0000000000..0c6a4585fc
--- /dev/null
+++ b/tests/tcg/ppc64/Makefile.target
@@ -0,0 +1,13 @@
+# -*- Mode: makefile -*-
+#
+# ppc64 specific tweaks
+
+VPATH += $(SRC_PATH)/tests/tcg/ppc64
+VPATH += $(SRC_PATH)/tests/tcg/ppc64le
+
+ifneq ($(DOCKER_IMAGE)$(CROSS_CC_HAS_POWER8_VECTOR),)
+PPC64_TESTS=bcdsub
+endif
+bcdsub: CFLAGS += -mpower8-vector
+
+TESTS += $(PPC64_TESTS)
diff --git a/tests/tcg/ppc64le/Makefile.target b/tests/tcg/ppc64le/Makefile.target
new file mode 100644
index 0000000000..1acfcff94a
--- /dev/null
+++ b/tests/tcg/ppc64le/Makefile.target
@@ -0,0 +1,12 @@
+# -*- Mode: makefile -*-
+#
+# ppc64le specific tweaks
+
+VPATH += $(SRC_PATH)/tests/tcg/ppc64le
+
+ifneq ($(DOCKER_IMAGE)$(CROSS_CC_HAS_POWER8_VECTOR),)
+PPC64LE_TESTS=bcdsub
+endif
+bcdsub: CFLAGS += -mpower8-vector
+
+TESTS += $(PPC64LE_TESTS)
diff --git a/tests/tcg/ppc64le/bcdsub.c b/tests/tcg/ppc64le/bcdsub.c
new file mode 100644
index 0000000000..8c188cae6d
--- /dev/null
+++ b/tests/tcg/ppc64le/bcdsub.c
@@ -0,0 +1,130 @@
+#include <assert.h>
+#include <unistd.h>
+#include <signal.h>
+
+#define CRF_LT (1 << 3)
+#define CRF_GT (1 << 2)
+#define CRF_EQ (1 << 1)
+#define CRF_SO (1 << 0)
+#define UNDEF 0
+
+#define BCDSUB(vra, vrb, ps) \
+ asm ("bcdsub. %1,%2,%3,%4;" \
+ "mfocrf %0,0b10;" \
+ : "=r" (cr), "=v" (vrt) \
+ : "v" (vra), "v" (vrb), "i" (ps) \
+ : );
+
+#define TEST(vra, vrb, ps, exp_res, exp_cr6) \
+ do { \
+ __int128 vrt = 0; \
+ int cr = 0; \
+ BCDSUB(vra, vrb, ps); \
+ if (exp_res) \
+ assert(vrt == exp_res); \
+ assert((cr >> 4) == exp_cr6); \
+ } while (0)
+
+
+/*
+ * Unbounded result is equal to zero:
+ * sign = (PS) ? 0b1111 : 0b1100
+ * CR6 = 0b0010
+ */
+void test_bcdsub_eq(void)
+{
+ __int128 a, b;
+
+ /* maximum positive BCD value */
+ a = b = (((__int128) 0x9999999999999999) << 64 | 0x999999999999999c);
+
+ TEST(a, b, 0, 0xc, CRF_EQ);
+ TEST(a, b, 1, 0xf, CRF_EQ);
+}
+
+/*
+ * Unbounded result is greater than zero:
+ * sign = (PS) ? 0b1111 : 0b1100
+ * CR6 = (overflow) ? 0b0101 : 0b0100
+ */
+void test_bcdsub_gt(void)
+{
+ __int128 a, b, c;
+
+ /* maximum positive BCD value */
+ a = (((__int128) 0x9999999999999999) << 64 | 0x999999999999999c);
+
+ /* negative one BCD value */
+ b = (__int128) 0x1d;
+
+ TEST(a, b, 0, 0xc, (CRF_GT | CRF_SO));
+ TEST(a, b, 1, 0xf, (CRF_GT | CRF_SO));
+
+ c = (((__int128) 0x9999999999999999) << 64 | 0x999999999999998c);
+
+ TEST(c, b, 0, a, CRF_GT);
+ TEST(c, b, 1, (a | 0x3), CRF_GT);
+}
+
+/*
+ * Unbounded result is less than zero:
+ * sign = 0b1101
+ * CR6 = (overflow) ? 0b1001 : 0b1000
+ */
+void test_bcdsub_lt(void)
+{
+ __int128 a, b;
+
+ /* positive zero BCD value */
+ a = (__int128) 0xc;
+
+ /* positive one BCD value */
+ b = (__int128) 0x1c;
+
+ TEST(a, b, 0, 0x1d, CRF_LT);
+ TEST(a, b, 1, 0x1d, CRF_LT);
+
+ /* maximum negative BCD value */
+ a = (((__int128) 0x9999999999999999) << 64 | 0x999999999999999d);
+
+ /* positive one BCD value */
+ b = (__int128) 0x1c;
+
+ TEST(a, b, 0, 0xd, (CRF_LT | CRF_SO));
+ TEST(a, b, 1, 0xd, (CRF_LT | CRF_SO));
+}
+
+void test_bcdsub_invalid(void)
+{
+ __int128 a, b;
+
+ /* positive one BCD value */
+ a = (__int128) 0x1c;
+ b = 0xf00;
+
+ TEST(a, b, 0, UNDEF, CRF_SO);
+ TEST(a, b, 1, UNDEF, CRF_SO);
+
+ TEST(b, a, 0, UNDEF, CRF_SO);
+ TEST(b, a, 1, UNDEF, CRF_SO);
+
+ a = 0xbad;
+
+ TEST(a, b, 0, UNDEF, CRF_SO);
+ TEST(a, b, 1, UNDEF, CRF_SO);
+}
+
+int main(void)
+{
+ struct sigaction action;
+
+ action.sa_handler = _exit;
+ sigaction(SIGABRT, &action, NULL);
+
+ test_bcdsub_eq();
+ test_bcdsub_gt();
+ test_bcdsub_lt();
+ test_bcdsub_invalid();
+
+ return 0;
+}