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author | Peter Maydell | 2019-02-01 15:55:43 +0100 |
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committer | Peter Maydell | 2019-02-01 15:55:43 +0100 |
commit | 4a30dc1c236888ffab1f5e30a5c76b35df917ab9 (patch) | |
tree | 12c81c42f8f4477f615150ab4d1ca2b6f41f3b4e /tests | |
parent | hw/arm/armsse: Add SSE-200 model (diff) | |
download | qemu-4a30dc1c236888ffab1f5e30a5c76b35df917ab9.tar.gz qemu-4a30dc1c236888ffab1f5e30a5c76b35df917ab9.tar.xz qemu-4a30dc1c236888ffab1f5e30a5c76b35df917ab9.zip |
hw/arm/mps2-tz: Add IRQ infrastructure to support SSE-200
In preparation for adding support for the AN521 MPS2 image, we need
to handle wiring up the MPS2 device interrupt lines to both CPUs in
the SSE-200, rather than just the one that the IoTKit has.
Abstract out a "connect to the IoTKit interrupt line" function
and make it connect to a splitter which feeds both sets of inputs
for the SSE-200 case.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190121185118.18550-23-peter.maydell@linaro.org
Diffstat (limited to 'tests')
0 files changed, 0 insertions, 0 deletions