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author | Niek Linnenbank | 2021-03-10 20:58:16 +0100 |
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committer | Peter Maydell | 2021-03-12 13:40:10 +0100 |
commit | b6f03acc8fe205a11e7040830f63113b7282538d (patch) | |
tree | 7c7f9564280fc2f4c038441b789bb8fb3ccfb8ae /tests | |
parent | target/arm: Update sve reduction vs simd_desc (diff) | |
download | qemu-b6f03acc8fe205a11e7040830f63113b7282538d.tar.gz qemu-b6f03acc8fe205a11e7040830f63113b7282538d.tar.xz qemu-b6f03acc8fe205a11e7040830f63113b7282538d.zip |
hw/net/allwinner-sun8i-emac: traverse transmit queue using TX_CUR_DESC register value
Currently the emulated EMAC for sun8i always traverses the transmit queue
from the head when transferring packets. It searches for a list of consecutive
descriptors whichs are flagged as ready for processing and transmits their payloads
accordingly. The controller stops processing once it finds a descriptor that is not
marked ready.
While the above behaviour works in most situations, it is not the same as the actual
EMAC in hardware. Actual hardware uses the TX_CUR_DESC register value to keep track
of the last position in the transmit queue and continues processing from that position
when software triggers the start of DMA processing. The currently emulated behaviour can
lead to packet loss on transmit when software fills the transmit queue with ready
descriptors that overlap the tail of the circular list.
This commit modifies the emulated EMAC for sun8i such that it processes
the transmit queue using the TX_CUR_DESC register in the same way as hardware.
Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210310195820.21950-2-nieklinnenbank@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'tests')
0 files changed, 0 insertions, 0 deletions