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authorAlistair Francis2020-03-03 00:08:51 +0100
committerAlistair Francis2020-04-29 22:16:36 +0200
commitfda5b000faf401cf595c4e87809eac3378ddbfd4 (patch)
tree6cc37ee44bcdd021efe17eff745b17b13a4679f8 /tests
parentriscv/sifive_u: Fix up file ordering (diff)
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riscv/sifive_u: Add a serial property to the sifive_u SoC
At present the board serial number is hard-coded to 1, and passed to OTP model during initialization. Firmware (FSBL, U-Boot) uses the serial number to generate a unique MAC address for the on-chip ethernet controller. When multiple QEMU 'sifive_u' instances are created and connected to the same subnet, they all have the same MAC address hence it creates a unusable network. A new "serial" property is introduced to the sifive_u SoC to specify the board serial number. When not given, the default serial number 1 is used. Suggested-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'tests')
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