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| author | Yongbok Kim | 2014-06-27 09:49:05 +0200 |
|---|---|---|
| committer | Leon Alrae | 2014-10-13 13:38:25 +0200 |
| commit | 31837be3eefed955504a3396d9baef8bcdec672e (patch) | |
| tree | bd5ef87a767da0e0e99fc246953f2d4fbba7ff11 /thread-pool.c | |
| parent | target-mips: add ALIGN, DALIGN, BITSWAP and DBITSWAP instructions (diff) | |
| download | qemu-31837be3eefed955504a3396d9baef8bcdec672e.tar.gz qemu-31837be3eefed955504a3396d9baef8bcdec672e.tar.xz qemu-31837be3eefed955504a3396d9baef8bcdec672e.zip | |
target-mips: add compact and CP1 branches
Introduce MIPS32R6 Compact Branch instructions which do not have delay slot -
they have forbidden slot instead. However, current implementation does not
support forbidden slot yet.
Add also BC1EQZ and BC1NEZ instructions.
Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Diffstat (limited to 'thread-pool.c')
0 files changed, 0 insertions, 0 deletions