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authorSergey Sorokin2015-10-16 12:14:52 +0200
committerPeter Maydell2015-10-16 12:14:52 +0200
commit6df99dec9e81838423d723996e96236693fa31fe (patch)
tree064423bd751b2305a233d2a30277aa877ffedd95 /translate-all.c
parenttarget-arm: Add missing 'static' attribute (diff)
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target-arm: Break the TB after ISB to execute self-modified code correctly
If any store instruction writes the code inside the same TB after this store insn, the execution of the TB must be stopped to execute new code correctly. As described in ARMv8 manual D3.4.6 self-modifying code must do an IC invalidation to be valid, and an ISB after it. So it's enough to end the TB after ISB instruction on the code translation. Also this TB break is necessary to take any pending interrupts immediately after an ISB (as required by ARMv8 ARM D1.14.4). Signed-off-by: Sergey Sorokin <afarallax@yandex.ru> [PMM: tweaked commit message and comments slightly] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'translate-all.c')
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