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author | Wei Huang | 2017-06-02 12:51:47 +0200 |
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committer | Peter Maydell | 2017-06-02 12:51:47 +0200 |
commit | 2b3ffa929249b15a75d8bde3e8e57a744f52aff0 (patch) | |
tree | cb7eb3a0cfd78fd77a5d340ff68444d5b39a0476 /util/crc32c.c | |
parent | hw/intc/arm_gicv3_cpuif: Fix priority masking for NS BPR1 (diff) | |
download | qemu-2b3ffa929249b15a75d8bde3e8e57a744f52aff0.tar.gz qemu-2b3ffa929249b15a75d8bde3e8e57a744f52aff0.tar.xz qemu-2b3ffa929249b15a75d8bde3e8e57a744f52aff0.zip |
target/arm: clear PMUVER field of AA64DFR0 when vPMU=off
The PMUv3 driver of linux kernel (in arch/arm64/kernel/perf_event.c)
relies on the PMUVER field of id_aa64dfr0_el1 to decide if PMU support
is present or not. This patch clears the PMUVER field under TCG mode
when vPMU=off. Without it, PMUv3 will init insider guest VMs even
with vPMU=off. This patch also removes a redundant line inside the
if-statement.
Signed-off-by: Wei Huang <wei@redhat.com>
Message-id: 1495123889-32301-1-git-send-email-wei@redhat.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'util/crc32c.c')
0 files changed, 0 insertions, 0 deletions