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| author | Peter Maydell | 2020-02-14 18:51:03 +0100 |
|---|---|---|
| committer | Peter Maydell | 2020-02-21 17:07:01 +0100 |
| commit | a617953855b65a602d36364b9643f7e5bc31288e (patch) | |
| tree | 9b8ef04fc4e905cbfc69a549722b15795e79e37a /util/unicode.c | |
| parent | target/arm: Use FIELD macros for clearing ID_DFR0 PERFMON field (diff) | |
| download | qemu-a617953855b65a602d36364b9643f7e5bc31288e.tar.gz qemu-a617953855b65a602d36364b9643f7e5bc31288e.tar.xz qemu-a617953855b65a602d36364b9643f7e5bc31288e.zip | |
target/arm: Define an aa32_pmu_8_1 isar feature test function
Instead of open-coding a check on the ID_DFR0 PerfMon ID register
field, create a standardly-named isar_feature for "does AArch32 have
a v8.1 PMUv3" and use it.
This entails moving the id_dfr0 field into the ARMISARegisters struct.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20200214175116.9164-9-peter.maydell@linaro.org
Diffstat (limited to 'util/unicode.c')
0 files changed, 0 insertions, 0 deletions