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| author | Peter Maydell | 2016-06-17 16:23:46 +0200 |
|---|---|---|
| committer | Peter Maydell | 2016-06-17 16:23:51 +0200 |
| commit | ce187c3c15f4bda579c9833cd78092fb73e651aa (patch) | |
| tree | bd9c801b0e14a81f6a8d5bf674b6716bb5bc2a7f /util | |
| parent | hw/intc/arm_gicv3: ARM GICv3 device framework (diff) | |
| download | qemu-ce187c3c15f4bda579c9833cd78092fb73e651aa.tar.gz qemu-ce187c3c15f4bda579c9833cd78092fb73e651aa.tar.xz qemu-ce187c3c15f4bda579c9833cd78092fb73e651aa.zip | |
hw/intc/arm_gicv3: Implement functions to identify next pending irq
Implement the GICv3 logic to recalculate the highest priority pending
interrupt for each CPU after some part of the GIC state has changed.
We avoid unnecessary full recalculation where possible.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org>
Tested-by: Shannon Zhao <shannon.zhao@linaro.org>
Message-id: 1465915112-29272-11-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'util')
0 files changed, 0 insertions, 0 deletions