diff options
| -rw-r--r-- | target/ppc/helper.h | 2 | ||||
| -rw-r--r-- | target/ppc/insn32.decode | 2 | ||||
| -rw-r--r-- | target/ppc/mmu-hash64.c | 2 | ||||
| -rw-r--r-- | target/ppc/translate.c | 12 | ||||
| -rw-r--r-- | target/ppc/translate/storage-ctrl-impl.c.inc | 14 |
5 files changed, 18 insertions, 14 deletions
diff --git a/target/ppc/helper.h b/target/ppc/helper.h index 98d6c40ac0..d1f9dff58f 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -678,7 +678,7 @@ DEF_HELPER_FLAGS_4(tlbie_isa300, TCG_CALL_NO_WG, void, \ env, tl, tl, i32) DEF_HELPER_FLAGS_3(SLBMTE, TCG_CALL_NO_RWG, void, env, tl, tl) DEF_HELPER_2(load_slb_esid, tl, env, tl) -DEF_HELPER_2(load_slb_vsid, tl, env, tl) +DEF_HELPER_2(SLBMFEV, tl, env, tl) DEF_HELPER_2(find_slb_vsid, tl, env, tl) DEF_HELPER_FLAGS_2(SLBIA, TCG_CALL_NO_RWG, void, env, i32) DEF_HELPER_FLAGS_2(SLBIE, TCG_CALL_NO_RWG, void, env, tl) diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index 2fc6e9cb27..0e002999bd 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -872,6 +872,8 @@ SLBIA 011111 --... ----- ----- 0111110010 - @X_ih SLBMTE 011111 ..... ----- ..... 0110010010 - @X_tb +SLBMFEV 011111 ..... ----- ..... 1101010011 - @X_tb + ## TLB Management Instructions &X_tlbie rb rs ric prs:bool r:bool diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c index 1922960608..7854b91043 100644 --- a/target/ppc/mmu-hash64.c +++ b/target/ppc/mmu-hash64.c @@ -343,7 +343,7 @@ target_ulong helper_find_slb_vsid(CPUPPCState *env, target_ulong rb) return rt; } -target_ulong helper_load_slb_vsid(CPUPPCState *env, target_ulong rb) +target_ulong helper_SLBMFEV(CPUPPCState *env, target_ulong rb) { PowerPCCPU *cpu = env_archcpu(env); target_ulong rt = 0; diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 169e97a706..e48a306036 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -5363,17 +5363,6 @@ static void gen_slbmfee(DisasContext *ctx) #endif /* defined(CONFIG_USER_ONLY) */ } -static void gen_slbmfev(DisasContext *ctx) -{ -#if defined(CONFIG_USER_ONLY) - GEN_PRIV(ctx); -#else - CHK_SV(ctx); - - gen_helper_load_slb_vsid(cpu_gpr[rS(ctx->opcode)], cpu_env, - cpu_gpr[rB(ctx->opcode)]); -#endif /* defined(CONFIG_USER_ONLY) */ -} static void gen_slbfee_(DisasContext *ctx) { @@ -6829,7 +6818,6 @@ GEN_HANDLER2(mtsr_64b, "mtsr", 0x1F, 0x12, 0x06, 0x0010F801, PPC_SEGMENT_64B), GEN_HANDLER2(mtsrin_64b, "mtsrin", 0x1F, 0x12, 0x07, 0x001F0001, PPC_SEGMENT_64B), GEN_HANDLER2(slbmfee, "slbmfee", 0x1F, 0x13, 0x1C, 0x001F0001, PPC_SEGMENT_64B), -GEN_HANDLER2(slbmfev, "slbmfev", 0x1F, 0x13, 0x1A, 0x001F0001, PPC_SEGMENT_64B), GEN_HANDLER2(slbfee_, "slbfee.", 0x1F, 0x13, 0x1E, 0x001F0000, PPC_SEGMENT_64B), #endif GEN_HANDLER(tlbia, 0x1F, 0x12, 0x0B, 0x03FFFC01, PPC_MEM_TLBIA), diff --git a/target/ppc/translate/storage-ctrl-impl.c.inc b/target/ppc/translate/storage-ctrl-impl.c.inc index 47d672d29a..11f44e9366 100644 --- a/target/ppc/translate/storage-ctrl-impl.c.inc +++ b/target/ppc/translate/storage-ctrl-impl.c.inc @@ -79,6 +79,20 @@ static bool trans_SLBMTE(DisasContext *ctx, arg_SLBMTE *a) return true; } +static bool trans_SLBMFEV(DisasContext *ctx, arg_SLBMFEV *a) +{ + REQUIRE_64BIT(ctx); + REQUIRE_INSNS_FLAGS(ctx, SEGMENT_64B); + REQUIRE_SV(ctx); + +#if !defined(CONFIG_USER_ONLY) && defined(TARGET_PPC64) + gen_helper_SLBMFEV(cpu_gpr[a->rt], cpu_env, cpu_gpr[a->rb]); +#else + qemu_build_not_reached(); +#endif + return true; +} + static bool do_tlbie(DisasContext *ctx, arg_X_tlbie *a, bool local) { #if defined(CONFIG_USER_ONLY) |