diff options
| -rw-r--r-- | tcg/tci.c | 26 |
1 files changed, 4 insertions, 22 deletions
@@ -57,13 +57,6 @@ static tcg_target_ulong tci_read_reg(const tcg_target_ulong *regs, TCGReg index) return regs[index]; } -#if TCG_TARGET_HAS_ext16s_i32 || TCG_TARGET_HAS_ext16s_i64 -static int16_t tci_read_reg16s(const tcg_target_ulong *regs, TCGReg index) -{ - return (int16_t)tci_read_reg(regs, index); -} -#endif - #if TCG_TARGET_REG_BITS == 64 static int32_t tci_read_reg32s(const tcg_target_ulong *regs, TCGReg index) { @@ -152,17 +145,6 @@ tci_read_r(const tcg_target_ulong *regs, const uint8_t **tb_ptr) return value; } -#if TCG_TARGET_HAS_ext16s_i32 || TCG_TARGET_HAS_ext16s_i64 -/* Read indexed register (16 bit signed) from bytecode. */ -static int16_t tci_read_r16s(const tcg_target_ulong *regs, - const uint8_t **tb_ptr) -{ - int16_t value = tci_read_reg16s(regs, **tb_ptr); - *tb_ptr += 1; - return value; -} -#endif - /* Read indexed register (32 bit) from bytecode. */ static uint32_t tci_read_r32(const tcg_target_ulong *regs, const uint8_t **tb_ptr) @@ -671,8 +653,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, #if TCG_TARGET_HAS_ext16s_i32 case INDEX_op_ext16s_i32: t0 = *tb_ptr++; - t1 = tci_read_r16s(regs, &tb_ptr); - tci_write_reg(regs, t0, t1); + t1 = tci_read_r(regs, &tb_ptr); + tci_write_reg(regs, t0, (int16_t)t1); break; #endif #if TCG_TARGET_HAS_ext8u_i32 @@ -886,8 +868,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, #if TCG_TARGET_HAS_ext16s_i64 case INDEX_op_ext16s_i64: t0 = *tb_ptr++; - t1 = tci_read_r16s(regs, &tb_ptr); - tci_write_reg(regs, t0, t1); + t1 = tci_read_r(regs, &tb_ptr); + tci_write_reg(regs, t0, (int16_t)t1); break; #endif #if TCG_TARGET_HAS_ext16u_i64 |