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-rw-r--r--hw/acpi/aml-build.c18
-rw-r--r--hw/i386/acpi-build.c3
-rw-r--r--hw/pci-bridge/Kconfig2
-rw-r--r--hw/pci-host/gpex-acpi.c87
-rw-r--r--hw/pci/shpc.c4
-rw-r--r--hw/virtio/vhost-user-fs-pci.c2
-rw-r--r--hw/virtio/vhost-user-fs.c10
-rw-r--r--include/hw/acpi/aml-build.h4
-rw-r--r--include/hw/virtio/vhost-user-fs.h1
-rw-r--r--tests/data/acpi/microvm/DSDT.pciebin3023 -> 3031 bytes
-rw-r--r--tests/data/acpi/virt/DSDTbin5196 -> 5204 bytes
-rw-r--r--tests/data/acpi/virt/DSDT.memhpbin6557 -> 6565 bytes
-rw-r--r--tests/data/acpi/virt/DSDT.numamembin5196 -> 5204 bytes
-rw-r--r--tests/data/acpi/virt/DSDT.pxbbin7802 -> 7689 bytes
-rw-r--r--tests/qtest/bios-tables-test.c4
15 files changed, 94 insertions, 41 deletions
diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
index f976aa667b..7b6ebb0cc8 100644
--- a/hw/acpi/aml-build.c
+++ b/hw/acpi/aml-build.c
@@ -2076,7 +2076,9 @@ void build_tpm2(GArray *table_data, BIOSLinker *linker, GArray *tcpalog)
tpm2_ptr, "TPM2", table_data->len - tpm2_start, 4, NULL, NULL);
}
-Aml *build_crs(PCIHostState *host, CrsRangeSet *range_set)
+Aml *build_crs(PCIHostState *host, CrsRangeSet *range_set, uint32_t io_offset,
+ uint32_t mmio32_offset, uint64_t mmio64_offset,
+ uint16_t bus_nr_offset)
{
Aml *crs = aml_resource_template();
CrsRangeSet temp_range_set;
@@ -2189,10 +2191,10 @@ Aml *build_crs(PCIHostState *host, CrsRangeSet *range_set)
for (i = 0; i < temp_range_set.io_ranges->len; i++) {
entry = g_ptr_array_index(temp_range_set.io_ranges, i);
aml_append(crs,
- aml_word_io(AML_MIN_FIXED, AML_MAX_FIXED,
- AML_POS_DECODE, AML_ENTIRE_RANGE,
- 0, entry->base, entry->limit, 0,
- entry->limit - entry->base + 1));
+ aml_dword_io(AML_MIN_FIXED, AML_MAX_FIXED,
+ AML_POS_DECODE, AML_ENTIRE_RANGE,
+ 0, entry->base, entry->limit, io_offset,
+ entry->limit - entry->base + 1));
crs_range_insert(range_set->io_ranges, entry->base, entry->limit);
}
@@ -2205,7 +2207,7 @@ Aml *build_crs(PCIHostState *host, CrsRangeSet *range_set)
aml_dword_memory(AML_POS_DECODE, AML_MIN_FIXED,
AML_MAX_FIXED, AML_NON_CACHEABLE,
AML_READ_WRITE,
- 0, entry->base, entry->limit, 0,
+ 0, entry->base, entry->limit, mmio32_offset,
entry->limit - entry->base + 1));
crs_range_insert(range_set->mem_ranges, entry->base, entry->limit);
}
@@ -2217,7 +2219,7 @@ Aml *build_crs(PCIHostState *host, CrsRangeSet *range_set)
aml_qword_memory(AML_POS_DECODE, AML_MIN_FIXED,
AML_MAX_FIXED, AML_NON_CACHEABLE,
AML_READ_WRITE,
- 0, entry->base, entry->limit, 0,
+ 0, entry->base, entry->limit, mmio64_offset,
entry->limit - entry->base + 1));
crs_range_insert(range_set->mem_64bit_ranges,
entry->base, entry->limit);
@@ -2230,7 +2232,7 @@ Aml *build_crs(PCIHostState *host, CrsRangeSet *range_set)
0,
pci_bus_num(host->bus),
max_bus,
- 0,
+ bus_nr_offset,
max_bus - pci_bus_num(host->bus) + 1));
return crs;
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index f18b71dea9..f56d699c7f 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -1360,7 +1360,8 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
}
aml_append(dev, build_prt(false));
- crs = build_crs(PCI_HOST_BRIDGE(BUS(bus)->parent), &crs_range_set);
+ crs = build_crs(PCI_HOST_BRIDGE(BUS(bus)->parent), &crs_range_set,
+ 0, 0, 0, 0);
aml_append(dev, aml_name_decl("_CRS", crs));
aml_append(scope, dev);
aml_append(dsdt, scope);
diff --git a/hw/pci-bridge/Kconfig b/hw/pci-bridge/Kconfig
index a51ec716f5..f8df4315ba 100644
--- a/hw/pci-bridge/Kconfig
+++ b/hw/pci-bridge/Kconfig
@@ -5,7 +5,7 @@ config PCIE_PORT
config PXB
bool
- default y if Q35
+ default y if Q35 || ARM_VIRT
config XIO3130
bool
diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c
index 7f20ee1c98..446912d771 100644
--- a/hw/pci-host/gpex-acpi.c
+++ b/hw/pci-host/gpex-acpi.c
@@ -112,10 +112,26 @@ static void acpi_dsdt_add_pci_osc(Aml *dev)
UUID = aml_touuid("E5C937D0-3553-4D7A-9117-EA4D19C3434D");
ifctx = aml_if(aml_equal(aml_arg(0), UUID));
ifctx1 = aml_if(aml_equal(aml_arg(2), aml_int(0)));
- uint8_t byte_list[1] = {1};
- buf = aml_buffer(1, byte_list);
+ uint8_t byte_list[] = {
+ 0x1 << 0 /* support for functions other than function 0 */ |
+ 0x1 << 5 /* support for function 5 */
+ };
+ buf = aml_buffer(ARRAY_SIZE(byte_list), byte_list);
aml_append(ifctx1, aml_return(buf));
aml_append(ifctx, ifctx1);
+
+ /*
+ * PCI Firmware Specification 3.1
+ * 4.6.5. _DSM for Ignoring PCI Boot Configurations
+ */
+ /* Arg2: Function Index: 5 */
+ ifctx1 = aml_if(aml_equal(aml_arg(2), aml_int(5)));
+ /*
+ * 0 - The operating system must not ignore the PCI configuration that
+ * firmware has done at boot time.
+ */
+ aml_append(ifctx1, aml_return(aml_int(0)));
+ aml_append(ifctx, ifctx1);
aml_append(method, ifctx);
byte_list[0] = 0;
@@ -130,6 +146,8 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
Aml *method, *crs, *dev, *rbuf;
PCIBus *bus = cfg->bus;
CrsRangeSet crs_range_set;
+ CrsRangeEntry *entry;
+ int i;
/* start to construct the tables for pxb */
crs_range_set_init(&crs_range_set);
@@ -168,7 +186,8 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
* 1. The resources the pci-brige/pcie-root-port need.
* 2. The resources the devices behind pxb need.
*/
- crs = build_crs(PCI_HOST_BRIDGE(BUS(bus)->parent), &crs_range_set);
+ crs = build_crs(PCI_HOST_BRIDGE(BUS(bus)->parent), &crs_range_set,
+ cfg->pio.base, 0, 0, 0);
aml_append(dev, aml_name_decl("_CRS", crs));
acpi_dsdt_add_pci_osc(dev);
@@ -176,7 +195,6 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
aml_append(scope, dev);
}
}
- crs_range_set_free(&crs_range_set);
/* tables for the main */
dev = aml_device("%s", "PCI0");
@@ -194,36 +212,55 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
aml_append(method, aml_return(aml_int(cfg->ecam.base)));
aml_append(dev, method);
+ /*
+ * At this point crs_range_set has all the ranges used by pci
+ * busses *other* than PCI0. These ranges will be excluded from
+ * the PCI0._CRS.
+ */
rbuf = aml_resource_template();
aml_append(rbuf,
aml_word_bus_number(AML_MIN_FIXED, AML_MAX_FIXED, AML_POS_DECODE,
0x0000, 0x0000, nr_pcie_buses - 1, 0x0000,
nr_pcie_buses));
if (cfg->mmio32.size) {
- aml_append(rbuf,
- aml_dword_memory(AML_POS_DECODE, AML_MIN_FIXED, AML_MAX_FIXED,
- AML_NON_CACHEABLE, AML_READ_WRITE, 0x0000,
- cfg->mmio32.base,
- cfg->mmio32.base + cfg->mmio32.size - 1,
- 0x0000,
- cfg->mmio32.size));
+ crs_replace_with_free_ranges(crs_range_set.mem_ranges,
+ cfg->mmio32.base,
+ cfg->mmio32.base + cfg->mmio32.size - 1);
+ for (i = 0; i < crs_range_set.mem_ranges->len; i++) {
+ entry = g_ptr_array_index(crs_range_set.mem_ranges, i);
+ aml_append(rbuf,
+ aml_dword_memory(AML_POS_DECODE, AML_MIN_FIXED, AML_MAX_FIXED,
+ AML_NON_CACHEABLE, AML_READ_WRITE, 0x0000,
+ entry->base, entry->limit,
+ 0x0000, entry->limit - entry->base + 1));
+ }
}
if (cfg->pio.size) {
- aml_append(rbuf,
- aml_dword_io(AML_MIN_FIXED, AML_MAX_FIXED, AML_POS_DECODE,
- AML_ENTIRE_RANGE, 0x0000, 0x0000,
- cfg->pio.size - 1,
- cfg->pio.base,
- cfg->pio.size));
+ crs_replace_with_free_ranges(crs_range_set.io_ranges,
+ 0x0000,
+ cfg->pio.size - 1);
+ for (i = 0; i < crs_range_set.io_ranges->len; i++) {
+ entry = g_ptr_array_index(crs_range_set.io_ranges, i);
+ aml_append(rbuf,
+ aml_dword_io(AML_MIN_FIXED, AML_MAX_FIXED, AML_POS_DECODE,
+ AML_ENTIRE_RANGE, 0x0000, entry->base,
+ entry->limit, cfg->pio.base,
+ entry->limit - entry->base + 1));
+ }
}
if (cfg->mmio64.size) {
- aml_append(rbuf,
- aml_qword_memory(AML_POS_DECODE, AML_MIN_FIXED, AML_MAX_FIXED,
- AML_NON_CACHEABLE, AML_READ_WRITE, 0x0000,
- cfg->mmio64.base,
- cfg->mmio64.base + cfg->mmio64.size - 1,
- 0x0000,
- cfg->mmio64.size));
+ crs_replace_with_free_ranges(crs_range_set.mem_64bit_ranges,
+ cfg->mmio64.base,
+ cfg->mmio64.base + cfg->mmio64.size - 1);
+ for (i = 0; i < crs_range_set.mem_64bit_ranges->len; i++) {
+ entry = g_ptr_array_index(crs_range_set.mem_64bit_ranges, i);
+ aml_append(rbuf,
+ aml_qword_memory(AML_POS_DECODE, AML_MIN_FIXED, AML_MAX_FIXED,
+ AML_NON_CACHEABLE, AML_READ_WRITE, 0x0000,
+ entry->base,
+ entry->limit, 0x0000,
+ entry->limit - entry->base + 1));
+ }
}
aml_append(dev, aml_name_decl("_CRS", rbuf));
@@ -242,4 +279,6 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
aml_append(dev_res0, aml_name_decl("_CRS", crs));
aml_append(dev, dev_res0);
aml_append(scope, dev);
+
+ crs_range_set_free(&crs_range_set);
}
diff --git a/hw/pci/shpc.c b/hw/pci/shpc.c
index 4786a44996..28e62174c4 100644
--- a/hw/pci/shpc.c
+++ b/hw/pci/shpc.c
@@ -300,7 +300,6 @@ static void shpc_slot_command(SHPCDevice *shpc, uint8_t target,
shpc_set_status(shpc, slot, SHPC_SLOT_STATUS_PRSNT_EMPTY,
SHPC_SLOT_STATUS_PRSNT_MASK);
shpc->config[SHPC_SLOT_EVENT_LATCH(slot)] |=
- SHPC_SLOT_EVENT_BUTTON |
SHPC_SLOT_EVENT_MRL |
SHPC_SLOT_EVENT_PRESENCE;
}
@@ -566,7 +565,6 @@ void shpc_device_unplug_request_cb(HotplugHandler *hotplug_dev,
return;
}
- shpc->config[SHPC_SLOT_EVENT_LATCH(slot)] |= SHPC_SLOT_EVENT_BUTTON;
state = shpc_get_status(shpc, slot, SHPC_SLOT_STATE_MASK);
led = shpc_get_status(shpc, slot, SHPC_SLOT_PWR_LED_MASK);
if (state == SHPC_STATE_DISABLED && led == SHPC_LED_OFF) {
@@ -577,6 +575,8 @@ void shpc_device_unplug_request_cb(HotplugHandler *hotplug_dev,
shpc->config[SHPC_SLOT_EVENT_LATCH(slot)] |=
SHPC_SLOT_EVENT_MRL |
SHPC_SLOT_EVENT_PRESENCE;
+ } else {
+ shpc->config[SHPC_SLOT_EVENT_LATCH(slot)] |= SHPC_SLOT_EVENT_BUTTON;
}
shpc_set_status(shpc, slot, 0, SHPC_SLOT_STATUS_66);
shpc_interrupt_update(pci_hotplug_dev);
diff --git a/hw/virtio/vhost-user-fs-pci.c b/hw/virtio/vhost-user-fs-pci.c
index 8bb389bd28..2ed8492b3f 100644
--- a/hw/virtio/vhost-user-fs-pci.c
+++ b/hw/virtio/vhost-user-fs-pci.c
@@ -68,6 +68,8 @@ static void vhost_user_fs_pci_instance_init(Object *obj)
virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
TYPE_VHOST_USER_FS);
+ object_property_add_alias(obj, "bootindex", OBJECT(&dev->vdev),
+ "bootindex");
}
static const VirtioPCIDeviceTypeInfo vhost_user_fs_pci_info = {
diff --git a/hw/virtio/vhost-user-fs.c b/hw/virtio/vhost-user-fs.c
index ed036ad9c1..ac4fc34b36 100644
--- a/hw/virtio/vhost-user-fs.c
+++ b/hw/virtio/vhost-user-fs.c
@@ -22,6 +22,7 @@
#include "qemu/error-report.h"
#include "hw/virtio/vhost-user-fs.h"
#include "monitor/monitor.h"
+#include "sysemu/sysemu.h"
static void vuf_get_config(VirtIODevice *vdev, uint8_t *config)
{
@@ -279,6 +280,14 @@ static Property vuf_properties[] = {
DEFINE_PROP_END_OF_LIST(),
};
+static void vuf_instance_init(Object *obj)
+{
+ VHostUserFS *fs = VHOST_USER_FS(obj);
+
+ device_add_bootindex_property(obj, &fs->bootindex, "bootindex",
+ "/filesystem@0", DEVICE(obj));
+}
+
static void vuf_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -300,6 +309,7 @@ static const TypeInfo vuf_info = {
.name = TYPE_VHOST_USER_FS,
.parent = TYPE_VIRTIO_DEVICE,
.instance_size = sizeof(VHostUserFS),
+ .instance_init = vuf_instance_init,
.class_init = vuf_class_init,
};
diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h
index e727bea1bc..54a5aec4d7 100644
--- a/include/hw/acpi/aml-build.h
+++ b/include/hw/acpi/aml-build.h
@@ -452,7 +452,9 @@ void crs_replace_with_free_ranges(GPtrArray *ranges,
void crs_range_set_init(CrsRangeSet *range_set);
void crs_range_set_free(CrsRangeSet *range_set);
-Aml *build_crs(PCIHostState *host, CrsRangeSet *range_set);
+Aml *build_crs(PCIHostState *host, CrsRangeSet *range_set, uint32_t io_offset,
+ uint32_t mmio32_offset, uint64_t mmio64_offset,
+ uint16_t bus_nr_offset);
void build_srat_memory(AcpiSratMemoryAffinity *numamem, uint64_t base,
uint64_t len, int node, MemoryAffinityFlags flags);
diff --git a/include/hw/virtio/vhost-user-fs.h b/include/hw/virtio/vhost-user-fs.h
index 6985752771..0d62834c25 100644
--- a/include/hw/virtio/vhost-user-fs.h
+++ b/include/hw/virtio/vhost-user-fs.h
@@ -39,6 +39,7 @@ struct VHostUserFS {
VhostUserState vhost_user;
VirtQueue **req_vqs;
VirtQueue *hiprio_vq;
+ int32_t bootindex;
/*< public >*/
};
diff --git a/tests/data/acpi/microvm/DSDT.pcie b/tests/data/acpi/microvm/DSDT.pcie
index 4b765541e3..e590b98f99 100644
--- a/tests/data/acpi/microvm/DSDT.pcie
+++ b/tests/data/acpi/microvm/DSDT.pcie
Binary files differ
diff --git a/tests/data/acpi/virt/DSDT b/tests/data/acpi/virt/DSDT
index bc519abff9..ea8a0869af 100644
--- a/tests/data/acpi/virt/DSDT
+++ b/tests/data/acpi/virt/DSDT
Binary files differ
diff --git a/tests/data/acpi/virt/DSDT.memhp b/tests/data/acpi/virt/DSDT.memhp
index 54728e2b4b..897648637c 100644
--- a/tests/data/acpi/virt/DSDT.memhp
+++ b/tests/data/acpi/virt/DSDT.memhp
Binary files differ
diff --git a/tests/data/acpi/virt/DSDT.numamem b/tests/data/acpi/virt/DSDT.numamem
index bc519abff9..ea8a0869af 100644
--- a/tests/data/acpi/virt/DSDT.numamem
+++ b/tests/data/acpi/virt/DSDT.numamem
Binary files differ
diff --git a/tests/data/acpi/virt/DSDT.pxb b/tests/data/acpi/virt/DSDT.pxb
index d5f0533a02..ce3b67dff2 100644
--- a/tests/data/acpi/virt/DSDT.pxb
+++ b/tests/data/acpi/virt/DSDT.pxb
Binary files differ
diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
index 4e026f90d0..669202fc95 100644
--- a/tests/qtest/bios-tables-test.c
+++ b/tests/qtest/bios-tables-test.c
@@ -1196,7 +1196,6 @@ static void test_acpi_virt_tcg_numamem(void)
}
-#ifdef CONFIG_PXB
static void test_acpi_virt_tcg_pxb(void)
{
test_data data = {
@@ -1228,7 +1227,6 @@ static void test_acpi_virt_tcg_pxb(void)
free_test_data(&data);
}
-#endif
static void test_acpi_tcg_acpi_hmat(const char *machine)
{
@@ -1342,9 +1340,7 @@ int main(int argc, char *argv[])
qtest_add_func("acpi/virt", test_acpi_virt_tcg);
qtest_add_func("acpi/virt/numamem", test_acpi_virt_tcg_numamem);
qtest_add_func("acpi/virt/memhp", test_acpi_virt_tcg_memhp);
-#ifdef CONFIG_PXB
qtest_add_func("acpi/virt/pxb", test_acpi_virt_tcg_pxb);
-#endif
}
ret = g_test_run();
boot_sector_cleanup(disk);
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2024-12-22 14:21:17 +0100