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Diffstat (limited to 'gdb-xml/loongarch-fpu.xml')
| -rw-r--r-- | gdb-xml/loongarch-fpu.xml | 50 |
1 files changed, 50 insertions, 0 deletions
diff --git a/gdb-xml/loongarch-fpu.xml b/gdb-xml/loongarch-fpu.xml new file mode 100644 index 0000000000..78e42cf5dd --- /dev/null +++ b/gdb-xml/loongarch-fpu.xml @@ -0,0 +1,50 @@ +<?xml version="1.0"?> +<!-- Copyright (C) 2021 Free Software Foundation, Inc. + + Copying and distribution of this file, with or without modification, + are permitted in any medium without royalty provided the copyright + notice and this notice are preserved. --> + +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> +<feature name="org.gnu.gdb.loongarch.fpu"> + + <union id="fputype"> + <field name="f" type="ieee_single"/> + <field name="d" type="ieee_double"/> + </union> + + <reg name="f0" bitsize="64" type="fputype" group="float"/> + <reg name="f1" bitsize="64" type="fputype" group="float"/> + <reg name="f2" bitsize="64" type="fputype" group="float"/> + <reg name="f3" bitsize="64" type="fputype" group="float"/> + <reg name="f4" bitsize="64" type="fputype" group="float"/> + <reg name="f5" bitsize="64" type="fputype" group="float"/> + <reg name="f6" bitsize="64" type="fputype" group="float"/> + <reg name="f7" bitsize="64" type="fputype" group="float"/> + <reg name="f8" bitsize="64" type="fputype" group="float"/> + <reg name="f9" bitsize="64" type="fputype" group="float"/> + <reg name="f10" bitsize="64" type="fputype" group="float"/> + <reg name="f11" bitsize="64" type="fputype" group="float"/> + <reg name="f12" bitsize="64" type="fputype" group="float"/> + <reg name="f13" bitsize="64" type="fputype" group="float"/> + <reg name="f14" bitsize="64" type="fputype" group="float"/> + <reg name="f15" bitsize="64" type="fputype" group="float"/> + <reg name="f16" bitsize="64" type="fputype" group="float"/> + <reg name="f17" bitsize="64" type="fputype" group="float"/> + <reg name="f18" bitsize="64" type="fputype" group="float"/> + <reg name="f19" bitsize="64" type="fputype" group="float"/> + <reg name="f20" bitsize="64" type="fputype" group="float"/> + <reg name="f21" bitsize="64" type="fputype" group="float"/> + <reg name="f22" bitsize="64" type="fputype" group="float"/> + <reg name="f23" bitsize="64" type="fputype" group="float"/> + <reg name="f24" bitsize="64" type="fputype" group="float"/> + <reg name="f25" bitsize="64" type="fputype" group="float"/> + <reg name="f26" bitsize="64" type="fputype" group="float"/> + <reg name="f27" bitsize="64" type="fputype" group="float"/> + <reg name="f28" bitsize="64" type="fputype" group="float"/> + <reg name="f29" bitsize="64" type="fputype" group="float"/> + <reg name="f30" bitsize="64" type="fputype" group="float"/> + <reg name="f31" bitsize="64" type="fputype" group="float"/> + <reg name="fcc" bitsize="64" type="uint64" group="float"/> + <reg name="fcsr" bitsize="32" type="uint32" group="float"/> +</feature> |