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Diffstat (limited to 'hw/ssi/imx_spi.c')
-rw-r--r--hw/ssi/imx_spi.c60
1 files changed, 29 insertions, 31 deletions
diff --git a/hw/ssi/imx_spi.c b/hw/ssi/imx_spi.c
index e85be6ae60..21e2c9dea3 100644
--- a/hw/ssi/imx_spi.c
+++ b/hw/ssi/imx_spi.c
@@ -279,42 +279,40 @@ static uint64_t imx_spi_read(void *opaque, hwaddr offset, unsigned size)
return 0;
}
- switch (index) {
- case ECSPI_RXDATA:
- if (!imx_spi_is_enabled(s)) {
- value = 0;
- } else if (fifo32_is_empty(&s->rx_fifo)) {
- /* value is undefined */
- value = 0xdeadbeef;
- } else {
- /* read from the RX FIFO */
- value = fifo32_pop(&s->rx_fifo);
- }
-
- break;
- case ECSPI_TXDATA:
- qemu_log_mask(LOG_GUEST_ERROR, "[%s]%s: Trying to read from TX FIFO\n",
- TYPE_IMX_SPI, __func__);
-
- /* Reading from TXDATA gives 0 */
-
- break;
- case ECSPI_MSGDATA:
- qemu_log_mask(LOG_GUEST_ERROR, "[%s]%s: Trying to read from MSG FIFO\n",
- TYPE_IMX_SPI, __func__);
+ value = s->regs[index];
+
+ if (imx_spi_is_enabled(s)) {
+ switch (index) {
+ case ECSPI_RXDATA:
+ if (fifo32_is_empty(&s->rx_fifo)) {
+ /* value is undefined */
+ value = 0xdeadbeef;
+ } else {
+ /* read from the RX FIFO */
+ value = fifo32_pop(&s->rx_fifo);
+ }
+ break;
+ case ECSPI_TXDATA:
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "[%s]%s: Trying to read from TX FIFO\n",
+ TYPE_IMX_SPI, __func__);
- /* Reading from MSGDATA gives 0 */
+ /* Reading from TXDATA gives 0 */
+ break;
+ case ECSPI_MSGDATA:
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "[%s]%s: Trying to read from MSG FIFO\n",
+ TYPE_IMX_SPI, __func__);
+ /* Reading from MSGDATA gives 0 */
+ break;
+ default:
+ break;
+ }
- break;
- default:
- value = s->regs[index];
- break;
+ imx_spi_update_irq(s);
}
-
DPRINTF("reg[%s] => 0x%" PRIx32 "\n", imx_spi_reg_name(index), value);
- imx_spi_update_irq(s);
-
return (uint64_t)value;
}