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-rw-r--r--target-tilegx/cpu.c5
-rw-r--r--target-tilegx/cpu.h2
2 files changed, 6 insertions, 1 deletions
diff --git a/target-tilegx/cpu.c b/target-tilegx/cpu.c
index 87aee248b4..78b73e45c4 100644
--- a/target-tilegx/cpu.c
+++ b/target-tilegx/cpu.c
@@ -119,7 +119,10 @@ static void tilegx_cpu_do_interrupt(CPUState *cs)
static int tilegx_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw,
int mmu_idx)
{
- cpu_dump_state(cs, stderr, fprintf, 0);
+ TileGXCPU *cpu = TILEGX_CPU(cs);
+
+ cs->exception_index = TILEGX_EXCP_SEGV;
+ cpu->env.excaddr = address;
return 1;
}
diff --git a/target-tilegx/cpu.h b/target-tilegx/cpu.h
index 2c86cd3890..3a62d20106 100644
--- a/target-tilegx/cpu.h
+++ b/target-tilegx/cpu.h
@@ -60,6 +60,7 @@ enum {
typedef enum {
TILEGX_EXCP_NONE = 0,
TILEGX_EXCP_SYSCALL = 1,
+ TILEGX_EXCP_SEGV = 2,
TILEGX_EXCP_OPCODE_UNKNOWN = 0x101,
TILEGX_EXCP_OPCODE_UNIMPLEMENTED = 0x102,
TILEGX_EXCP_OPCODE_CMPEXCH = 0x103,
@@ -87,6 +88,7 @@ typedef struct CPUTLGState {
#if defined(CONFIG_USER_ONLY)
uint32_t excparam; /* exception parameter */
+ uint64_t excaddr; /* exception address */
#endif
CPU_COMMON