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-rw-r--r--target/arm/t32.decode1
1 files changed, 1 insertions, 0 deletions
diff --git a/target/arm/t32.decode b/target/arm/t32.decode
index 2d47f31f14..78fadef9d6 100644
--- a/target/arm/t32.decode
+++ b/target/arm/t32.decode
@@ -748,5 +748,6 @@ BL 1111 0. .......... 11.1 ............ @branch24
# This is DLSTP
DLS 1111 0 0000 0 size:2 rn:4 1110 0000 0000 0001
}
+ VCTP 1111 0 0000 0 size:2 rn:4 1110 1000 0000 0001
]
}