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-rw-r--r--target/arm/translate.c15
1 files changed, 0 insertions, 15 deletions
diff --git a/target/arm/translate.c b/target/arm/translate.c
index b74a4350e3..4ffd8b1fbe 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -2470,21 +2470,6 @@ static int disas_dsp_insn(DisasContext *s, uint32_t insn)
return 1;
}
-#define VFP_REG_SHR(x, n) (((n) > 0) ? (x) >> (n) : (x) << -(n))
-#define VFP_DREG(reg, insn, bigbit, smallbit) do { \
- if (dc_isar_feature(aa32_simd_r32, s)) { \
- reg = (((insn) >> (bigbit)) & 0x0f) \
- | (((insn) >> ((smallbit) - 4)) & 0x10); \
- } else { \
- if (insn & (1 << (smallbit))) \
- return 1; \
- reg = ((insn) >> (bigbit)) & 0x0f; \
- }} while (0)
-
-#define VFP_DREG_D(reg, insn) VFP_DREG(reg, insn, 12, 22)
-#define VFP_DREG_N(reg, insn) VFP_DREG(reg, insn, 16, 7)
-#define VFP_DREG_M(reg, insn) VFP_DREG(reg, insn, 0, 5)
-
static inline bool use_goto_tb(DisasContext *s, target_ulong dest)
{
#ifndef CONFIG_USER_ONLY