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-rw-r--r--target/mips/translate.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/mips/translate.c b/target/mips/translate.c
index f218997f04..ccc82abce0 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -31917,7 +31917,7 @@ void cpu_state_reset(CPUMIPSState *env)
cpu_mips_store_count(env, 1);
- if (env->CP0_Config3 & (1 << CP0C3_MT)) {
+ if (ase_mt_available(env)) {
int i;
/* Only TC0 on VPE 0 starts as active. */