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-rw-r--r--target/mips/translate.c18
1 files changed, 0 insertions, 18 deletions
diff --git a/target/mips/translate.c b/target/mips/translate.c
index ccc82abce0..84d2d44e5d 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -31766,24 +31766,6 @@ void cpu_mips_realize_env(CPUMIPSState *env)
mvp_init(env);
}
-bool cpu_type_supports_cps_smp(const char *cpu_type)
-{
- const MIPSCPUClass *mcc = MIPS_CPU_CLASS(object_class_by_name(cpu_type));
- return (mcc->cpu_def->CP0_Config3 & (1 << CP0C3_CMGCR)) != 0;
-}
-
-bool cpu_type_supports_isa(const char *cpu_type, uint64_t isa)
-{
- const MIPSCPUClass *mcc = MIPS_CPU_CLASS(object_class_by_name(cpu_type));
- return (mcc->cpu_def->insn_flags & isa) != 0;
-}
-
-void cpu_set_exception_base(int vp_index, target_ulong address)
-{
- MIPSCPU *vp = MIPS_CPU(qemu_get_cpu(vp_index));
- vp->env.exception_base = address;
-}
-
void cpu_state_reset(CPUMIPSState *env)
{
CPUState *cs = env_cpu(env);