diff options
Diffstat (limited to 'target/ppc/mmu_common.c')
| -rw-r--r-- | target/ppc/mmu_common.c | 41 |
1 files changed, 4 insertions, 37 deletions
diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c index 86795b2814..4e278365ca 100644 --- a/target/ppc/mmu_common.c +++ b/target/ppc/mmu_common.c @@ -1173,11 +1173,9 @@ void dump_mmu(CPUPPCState *env) static int check_physical(CPUPPCState *env, mmu_ctx_t *ctx, target_ulong eaddr, MMUAccessType access_type) { - int in_plb, ret; - ctx->raddr = eaddr; ctx->prot = PAGE_READ | PAGE_EXEC; - ret = 0; + switch (env->mmu_model) { case POWERPC_MMU_SOFT_6xx: case POWERPC_MMU_SOFT_4xx: @@ -1186,39 +1184,12 @@ static int check_physical(CPUPPCState *env, mmu_ctx_t *ctx, target_ulong eaddr, ctx->prot |= PAGE_WRITE; break; - case POWERPC_MMU_SOFT_4xx_Z: - if (unlikely(msr_pe != 0)) { - /* - * 403 family add some particular protections, using - * PBL/PBU registers for accesses with no translation. - */ - in_plb = - /* Check PLB validity */ - (env->pb[0] < env->pb[1] && - /* and address in plb area */ - eaddr >= env->pb[0] && eaddr < env->pb[1]) || - (env->pb[2] < env->pb[3] && - eaddr >= env->pb[2] && eaddr < env->pb[3]) ? 1 : 0; - if (in_plb ^ msr_px) { - /* Access in protected area */ - if (access_type == MMU_DATA_STORE) { - /* Access is not allowed */ - ret = -2; - } - } else { - /* Read-write access is allowed */ - ctx->prot |= PAGE_WRITE; - } - } - break; - default: /* Caller's checks mean we should never get here for other models */ - abort(); - return -1; + g_assert_not_reached(); } - return ret; + return 0; } int get_physical_address_wtlb(CPUPPCState *env, mmu_ctx_t *ctx, @@ -1247,7 +1218,6 @@ int get_physical_address_wtlb(CPUPPCState *env, mmu_ctx_t *ctx, break; case POWERPC_MMU_SOFT_4xx: - case POWERPC_MMU_SOFT_4xx_Z: if (real_mode) { ret = check_physical(env, ctx, eaddr, access_type); } else { @@ -1381,7 +1351,6 @@ static bool ppc_jumbo_xlate(PowerPCCPU *cpu, vaddr eaddr, env->spr[SPR_ICMP] = 0x80000000 | ctx.ptem; goto tlb_miss; case POWERPC_MMU_SOFT_4xx: - case POWERPC_MMU_SOFT_4xx_Z: cs->exception_index = POWERPC_EXCP_ITLB; env->error_code = 0; env->spr[SPR_40x_DEAR] = eaddr; @@ -1449,7 +1418,6 @@ static bool ppc_jumbo_xlate(PowerPCCPU *cpu, vaddr eaddr, get_pteg_offset32(cpu, ctx.hash[1]); break; case POWERPC_MMU_SOFT_4xx: - case POWERPC_MMU_SOFT_4xx_Z: cs->exception_index = POWERPC_EXCP_DTLB; env->error_code = 0; env->spr[SPR_40x_DEAR] = eaddr; @@ -1482,8 +1450,7 @@ static bool ppc_jumbo_xlate(PowerPCCPU *cpu, vaddr eaddr, /* Access rights violation */ cs->exception_index = POWERPC_EXCP_DSI; env->error_code = 0; - if (env->mmu_model == POWERPC_MMU_SOFT_4xx - || env->mmu_model == POWERPC_MMU_SOFT_4xx_Z) { + if (env->mmu_model == POWERPC_MMU_SOFT_4xx) { env->spr[SPR_40x_DEAR] = eaddr; if (access_type == MMU_DATA_STORE) { env->spr[SPR_40x_ESR] |= 0x00800000; |