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-rw-r--r--target/riscv/cpu.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index ddea8fbeeb..2a990f6253 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -506,7 +506,7 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp)
return;
}
} else {
- qemu_log("vector verison is not specified, "
+ qemu_log("vector version is not specified, "
"use the default value v0.7.1\n");
}
set_vext_version(env, vext_version);