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-rw-r--r--target/arm/cpu.h8
-rw-r--r--target/arm/helper.c5
-rw-r--r--target/arm/m_helper.c7
3 files changed, 9 insertions, 11 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index f3bca73d98..84cc2de3b1 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -1068,14 +1068,6 @@ static inline void aarch64_sve_change_el(CPUARMState *env, int o,
static inline void aarch64_add_sve_properties(Object *obj) { }
#endif
-#if !defined(CONFIG_TCG)
-static inline target_ulong do_arm_semihosting(CPUARMState *env)
-{
- g_assert_not_reached();
-}
-#else
-target_ulong do_arm_semihosting(CPUARMState *env);
-#endif
void aarch64_sync_32_to_64(CPUARMState *env);
void aarch64_sync_64_to_32(CPUARMState *env);
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 8a492465d6..c5377e7ecb 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -34,6 +34,7 @@
#ifdef CONFIG_TCG
#include "arm_ldst.h"
#include "exec/cpu_ldst.h"
+#include "hw/semihosting/common-semi.h"
#endif
#define ARM_CPU_FREQ 1000000000 /* FIXME: 1 GHz, should be configurable */
@@ -9875,13 +9876,13 @@ static void handle_semihosting(CPUState *cs)
qemu_log_mask(CPU_LOG_INT,
"...handling as semihosting call 0x%" PRIx64 "\n",
env->xregs[0]);
- env->xregs[0] = do_arm_semihosting(env);
+ env->xregs[0] = do_common_semihosting(cs);
env->pc += 4;
} else {
qemu_log_mask(CPU_LOG_INT,
"...handling as semihosting call 0x%x\n",
env->regs[0]);
- env->regs[0] = do_arm_semihosting(env);
+ env->regs[0] = do_common_semihosting(cs);
env->regs[15] += env->thumb ? 2 : 4;
}
}
diff --git a/target/arm/m_helper.c b/target/arm/m_helper.c
index 643dcafb83..6176003029 100644
--- a/target/arm/m_helper.c
+++ b/target/arm/m_helper.c
@@ -31,6 +31,7 @@
#ifdef CONFIG_TCG
#include "arm_ldst.h"
#include "exec/cpu_ldst.h"
+#include "hw/semihosting/common-semi.h"
#endif
static void v7m_msr_xpsr(CPUARMState *env, uint32_t mask,
@@ -2306,7 +2307,11 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs)
qemu_log_mask(CPU_LOG_INT,
"...handling as semihosting call 0x%x\n",
env->regs[0]);
- env->regs[0] = do_arm_semihosting(env);
+#ifdef CONFIG_TCG
+ env->regs[0] = do_common_semihosting(cs);
+#else
+ g_assert_not_reached();
+#endif
env->regs[15] += env->thumb ? 2 : 4;
return;
case EXCP_BKPT: