diff options
Diffstat (limited to 'target')
| -rw-r--r-- | target/mips/cpu.h | 4 | ||||
| -rw-r--r-- | target/mips/translate.c | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/target/mips/cpu.h b/target/mips/cpu.h index 23f8c6f96c..9c65c87bf9 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -1286,8 +1286,8 @@ int cpu_mips_signal_handler(int host_signum, void *pinfo, void *puc); #define MIPS_CPU_TYPE_NAME(model) model MIPS_CPU_TYPE_SUFFIX #define CPU_RESOLVING_TYPE TYPE_MIPS_CPU -bool cpu_supports_cps_smp(const char *cpu_type); -bool cpu_supports_isa(const char *cpu_type, uint64_t isa); +bool cpu_type_supports_cps_smp(const char *cpu_type); +bool cpu_type_supports_isa(const char *cpu_type, uint64_t isa); void cpu_set_exception_base(int vp_index, target_ulong address); /* mips_int.c */ diff --git a/target/mips/translate.c b/target/mips/translate.c index c64a1bc42e..b8ed16bb77 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -31770,13 +31770,13 @@ void cpu_mips_realize_env(CPUMIPSState *env) mvp_init(env, env->cpu_model); } -bool cpu_supports_cps_smp(const char *cpu_type) +bool cpu_type_supports_cps_smp(const char *cpu_type) { const MIPSCPUClass *mcc = MIPS_CPU_CLASS(object_class_by_name(cpu_type)); return (mcc->cpu_def->CP0_Config3 & (1 << CP0C3_CMGCR)) != 0; } -bool cpu_supports_isa(const char *cpu_type, uint64_t isa) +bool cpu_type_supports_isa(const char *cpu_type, uint64_t isa) { const MIPSCPUClass *mcc = MIPS_CPU_CLASS(object_class_by_name(cpu_type)); return (mcc->cpu_def->insn_flags & isa) != 0; |