diff options
Diffstat (limited to 'target')
| -rw-r--r-- | target/arm/helper.c | 1 | ||||
| -rw-r--r-- | target/i386/cpu.c | 1 | ||||
| -rw-r--r-- | target/i386/translate.c | 10 | ||||
| -rw-r--r-- | target/ppc/translate_init.c | 1 | ||||
| -rw-r--r-- | target/s390x/cpu_models.c | 1 |
5 files changed, 9 insertions, 5 deletions
diff --git a/target/arm/helper.c b/target/arm/helper.c index 77ea5e0025..6c5c7ec811 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -5214,6 +5214,7 @@ static void arm_cpu_add_definition(gpointer data, gpointer user_data) info = g_malloc0(sizeof(*info)); info->name = g_strndup(typename, strlen(typename) - strlen("-" TYPE_ARM_CPU)); + info->q_typename = g_strdup(typename); entry = g_malloc0(sizeof(*entry)); entry->value = info; diff --git a/target/i386/cpu.c b/target/i386/cpu.c index b0640f1e38..a149c8dc42 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -2235,6 +2235,7 @@ static void x86_cpu_definition_entry(gpointer data, gpointer user_data) info->name = x86_cpu_class_get_model_name(cc); x86_cpu_class_check_missing_features(cc, &info->unavailable_features); info->has_unavailable_features = true; + info->q_typename = g_strdup(object_class_get_name(oc)); entry = g_malloc0(sizeof(*entry)); entry->value = info; diff --git a/target/i386/translate.c b/target/i386/translate.c index 5f5e60dab1..72c1b03a2a 100644 --- a/target/i386/translate.c +++ b/target/i386/translate.c @@ -6443,10 +6443,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, tcg_const_i32(s->pc - s->cs_base)); set_cc_op(s, CC_OP_EFLAGS); } - /* TF handling for the syscall insn is different. The TF bit is checked - after the syscall insn completes. This allows #DB to not be - generated after one has entered CPL0 if TF is set in FMASK. */ - gen_eob_worker(s, false, true); + gen_eob(s); break; case 0xe8: /* call im */ { @@ -7124,7 +7121,10 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, gen_update_cc_op(s); gen_jmp_im(pc_start - s->cs_base); gen_helper_syscall(cpu_env, tcg_const_i32(s->pc - pc_start)); - gen_eob(s); + /* TF handling for the syscall insn is different. The TF bit is checked + after the syscall insn completes. This allows #DB to not be + generated after one has entered CPL0 if TF is set in FMASK. */ + gen_eob_worker(s, false, true); break; case 0x107: /* sysret */ if (!s->pe) { diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c index 626e03186c..19ef2505e4 100644 --- a/target/ppc/translate_init.c +++ b/target/ppc/translate_init.c @@ -10305,6 +10305,7 @@ CpuDefinitionInfoList *arch_query_cpu_definitions(Error **errp) info = g_malloc0(sizeof(*info)); info->name = g_strdup(alias->alias); + info->q_typename = g_strdup(object_class_get_name(oc)); entry = g_malloc0(sizeof(*entry)); entry->value = info; diff --git a/target/s390x/cpu_models.c b/target/s390x/cpu_models.c index c1e729df5e..5b66d3325d 100644 --- a/target/s390x/cpu_models.c +++ b/target/s390x/cpu_models.c @@ -290,6 +290,7 @@ static void create_cpu_model_list(ObjectClass *klass, void *opaque) info->has_migration_safe = true; info->migration_safe = scc->is_migration_safe; info->q_static = scc->is_static; + info->q_typename = g_strdup(object_class_get_name(klass)); entry = g_malloc0(sizeof(*entry)); |