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| * xhci: only free completed transfersGerd Hoffmann2017-02-061-1/+3
| | | | | | | | | | | | | | | | | | | | Most callsites check already, one was missed. Cc: 1653384@bugs.launchpad.net Fixes: 94b037f2a451b3dc855f9f2c346e5049a361bd55 Reported-by: Fabian Lesniak <fabian@lesniak-it.de> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 1485790607-31399-2-git-send-email-kraxel@redhat.com
| * usb: accept usb3 control requestsGerd Hoffmann2017-02-062-0/+9
| | | | | | | | | | | | | | | | Windows 10 reportedly sends these, so accept them in case the device in question is a superspeed (usb3) device. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 1485870727-21956-2-git-send-email-kraxel@redhat.com
| * usb/uas: more verbose error messageGerd Hoffmann2017-02-061-1/+2
| | | | | | | | | | | | | | | | Print some more details in case we get a unknown control request, to ease trouble-shooting. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 1485870727-21956-1-git-send-email-kraxel@redhat.com
| * hw/usb/dev-hid: Improve guest compatibility of usb-tabletPhil Dennis-Jordan2017-02-061-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. Set bInterfaceProtocol to 0x00 for usb-tablet. This should be non-zero for boot protocol devices only, which the usb-tablet is not. 2. Set the usb-tablet's usage to "mouse" in the report descriptor. The boot protocol of 0x02 specifically confused OS X/macOS' HID driver stack, causing it to generate additional bogus HID events with relative motion in addition to the tablet's absolute coordinate events. Absolute pointing devices with HID Report Descriptor usage of 0x01 (pointing) are treated by the macOS HID driver as analog sticks, and absolute coordinates are not directly translated to absolute mouse cursor positions. Changing it to 0x02 (mouse) fixes the problem, and does not have any adverse effect in other operating systems and windowing systems. (VMWare does the same thing.) Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu> Message-id: 1485365075-32702-1-git-send-email-phil@philjordan.eu Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
* | Merge remote-tracking branch 'remotes/dgibson/tags/isa-cleanup-20170206' ↵Peter Maydell2017-02-0621-212/+305
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into staging Allow ISA to be disabled on some platforms (v3) This makes some cleanups that are a start on allowing ISA to be compiled out for platforms which don't use it. I posted this series last November, and it collected a number of R-bs and no apparent objections. So, I've now rebased it (trivially) and am sending a pull request in the hopes of merge. A lot of the pieces here don't have a clear maintainer, so I'm sending it directly to Peter. Notes: * Patch 3/3 triggers a style warning, but that's just because I'm moving a C++ // comment verbatim from one file to another Changes since v2: * Trivial rebase Changes since v1: * Fixed some silly compile errors in 3/3 exposed by some changes in other headers # gpg: Signature made Mon 06 Feb 2017 01:37:50 GMT # gpg: using RSA key 0x6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dgibson/tags/isa-cleanup-20170206: Split ISA and sysbus versions of m48t59 device Allow ISA bus to be configured out Split serial-isa into its own config option Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * Split ISA and sysbus versions of m48t59 deviceDavid Gibson2017-02-064-210/+284
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The m48t59 device supports both ISA and direct sysbus attached versions of the device in the one .c file. This can be awkward for some embedded machine types which need the sysbus M48T59, but don't want to pull in the ISA bus code and its other dependencies. Therefore, this patch splits out the code for the ISA attached M48T59 into its own C file. It will be built when both CONFIG_M48T59 and CONFIG_ISA_BUS are enabled. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
| * Allow ISA bus to be configured outDavid Gibson2017-02-065-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, the code to handle the legacy ISA bus is always included in qemu. However there are lots of platforms that don't include ISA legacy devies, and quite a few that have never used ISA legacy devices at all. This patch allows the ISA bus code to be disabled in the configuration for platforms where it doesn't make sense. For now, the default configs are adjusted to include ISA on all platforms including PCI: anything with PCI can at least in principle add an i82378 PCI->ISA bridge. Also, CONFIG_IDE_CORE which is already in pci.mak requires ISA support. We also explicitly enable ISA on some other non-PCI platforms which include ISA devices: moxie, sparc and unicore32. We may want to pare this down in future. The platforms that will lose ISA by default are: cris, lm32, microblazeel, microblaze, openrisc, s390x, tricore, xtensaeb, xtensa. As far as I can tell none of these ever used ISA. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Acked-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
| * Split serial-isa into its own config optionDavid Gibson2017-02-0614-1/+15
|/ | | | | | | | | | | | | | | | | | | | | | | | At present, the core device model code for 8250-like serial ports (serial.c) and the code for serial ports attached to ISA-style legacy IO (serial-isa.c) are both controlled by the CONFIG_SERIAL variable. There are lots and lots of embedded platforms that have 8250-like serial ports but have never had anything resembling ISA legacy IO. Therefore, split serial-isa into its own CONFIG_SERIAL_ISA option so it can be disabled for platforms where it's not appropriate. For now, I enabled CONFIG_SERIAL_ISA in every default-config where CONFIG_SERIAL is enabled, excepting microblaze, or32, and xtensa. As best as I can tell, those platforms never used legacy ISA, and also don't include PCI support (which would allow connection of a PCI->ISA bridge and/or a southbridge including legacy ISA serial ports). Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Thomas Huth <thuth@redhat.com> Acked-by: Christian Borntraeger <borntraeger@de.ibm.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
* Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into ↵Peter Maydell2017-02-031-0/+14
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | staging # gpg: Signature made Fri 03 Feb 2017 14:37:45 GMT # gpg: using RSA key 0x9CA4ABB381AB73C8 # gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" # gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>" # Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8 * remotes/stefanha/tags/block-pull-request: iothread: enable AioContext polling by default Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * iothread: enable AioContext polling by defaultStefan Hajnoczi2017-02-031-0/+14
|/ | | | | | | | | | | | | | | | | | | | | IOThread AioContexts are likely to consist only of event sources like virtqueue ioeventfds and LinuxAIO completion eventfds that are pollable from userspace (without system calls). We recently merged the AioContext polling feature but didn't enable it by default yet. I have gone back over the performance data on the mailing list and picked a default polling value that gave good results. Let's enable AioContext polling by default so users don't have another switch they need to set manually. If performance regressions are found we can still disable this for the QEMU 2.9 release. Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Christian Borntraeger <borntraeger@de.ibm.com> Cc: Karl Rister <krister@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Message-id: 20170126170119.27876-1-stefanha@redhat.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
* Merge remote-tracking branch 'remotes/sstabellini/tags/xen-20170202' into ↵Peter Maydell2017-02-035-30/+42
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | staging Xen 2017/02/02 # gpg: Signature made Thu 02 Feb 2017 18:26:58 GMT # gpg: using RSA key 0x894F8F4870E1AE90 # gpg: Good signature from "Stefano Stabellini <sstabellini@kernel.org>" # gpg: aka "Stefano Stabellini <stefano.stabellini@eu.citrix.com>" # Primary key fingerprint: D04E 33AB A51F 67BA 07D3 0AEA 894F 8F48 70E1 AE90 * remotes/sstabellini/tags/xen-20170202: xen: use qdev_unplug() instead of g_free() in xen_pv_find_xendev() MAINTAINERS: Update xen-devel mailing list address xen-platform: add missing disk unplug option xen-platform: add support for unplugging NVMe disks... xen-platform: re-structure unplug_disks Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * xen: use qdev_unplug() instead of g_free() in xen_pv_find_xendev()Juergen Gross2017-02-021-6/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The error exits of xen_pv_find_xendev() free the new xen-device via g_free() which is wrong. As the xen-device has been initialized as qdev it must be removed via qdev_unplug(). This bug has been introduced with commit 3a6c9172ac5951e6dac2b3f6 ("xen: create qdev for each backend device"). Reported-by: Roger Pau Monné <roger.pau@citrix.com> Tested-by: Roger Pau Monné <roger.pau@citrix.com> Signed-off-by: Juergen Gross <jgross@suse.com> Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
| * MAINTAINERS: Update xen-devel mailing list addressAnthony PERARD2017-01-281-1/+1
| | | | | | | | | | Signed-off-by: Anthony PERARD <anthony.perard@citrix.com> Acked-by: Stefano Stabellini <sstabellini@kernel.org>
| * xen-platform: add missing disk unplug optionPaul Durrant2017-01-283-15/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Xen HVM unplug protocol [1] specifies a mechanism to allow guests to request unplug of 'aux' disks (which is stated to mean all IDE disks, except the primary master). This patch adds support for that unplug request. NOTE: The semantics of what happens if unplug of all disks and 'aux' disks is simultaneously requests is not clear. The patch makes that assumption that an 'all' request overrides an 'aux' request. [1] http://xenbits.xen.org/gitweb/?p=xen.git;a=blob;f=docs/misc/hvm-emulated-unplug.markdown Signed-off-by: Paul Durrant <paul.durrant@citrix.com> Reviewed-by: Stefano Stabellini <sstabellini@kernel.org> ---- Cc: Stefano Stabellini <sstabellini@kernel.org> Cc: Anthony Perard <anthony.perard@citrix.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Richard Henderson <rth@twiddle.net> Cc: Eduardo Habkost <ehabkost@redhat.com> Cc: "Michael S. Tsirkin" <mst@redhat.com> Cc: John Snow <jsnow@redhat.com>
| * xen-platform: add support for unplugging NVMe disks...Paul Durrant2017-01-281-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | ...not just IDE and SCSI. This patch allows the Xen tool-stack to fully support of NVMe as an emulated disk type. See [1] for the relevant tool-stack patch discussion. [1] https://lists.xen.org/archives/html/xen-devel/2017-01/msg01225.html Signed-off-by: Paul Durrant <paul.durrant@citrix.com> Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
| * xen-platform: re-structure unplug_disksPaul Durrant2017-01-281-9/+16
| | | | | | | | | | | | | | | | | | | | | | | | The current code is poorly structured and potentially leads to multiple config space reads when one is sufficient. Also the UNPLUG_ALL_IDE_DISKS flag is mis-named since it also results in SCSI disks being unplugged. This patch renames the flag and re-structures the code to be more efficient, and readable. Signed-off-by: Paul Durrant <paul.durrant@citrix.com> Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
* | tci: Remove invalid assertionsStefan Weil2017-02-031-2/+0Star
| | | | | | | | | | | | | | | | | | | | tb_jmp_insn_offset and tb_jmp_reset_offset are pointers and cannot be used with ARRAY_SIZE. Signed-off-by: Stefan Weil <sw@weilnetz.de> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 20170202195601.11286-1-sw@weilnetz.de Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* | Merge remote-tracking branch 'remotes/kraxel/tags/pull-vga-20170202-2' into ↵Peter Maydell2017-02-031-25/+39
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | staging cirrus: multiple bugfixes, including CVE-2017-2615 fix. # gpg: Signature made Thu 02 Feb 2017 15:03:35 GMT # gpg: using RSA key 0x4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/pull-vga-20170202-2: cirrus: fix oob access issue (CVE-2017-2615) cirrus: fix blit address mask handling cirrus: allow zero source pitch in pattern fill rops cirrus: handle negative pitch in cirrus_invalidate_region() Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | cirrus: fix oob access issue (CVE-2017-2615)Li Qiang2017-02-021-4/+3Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When doing bitblt copy in backward mode, we should minus the blt width first just like the adding in the forward mode. This can avoid the oob access of the front of vga's vram. Signed-off-by: Li Qiang <liqiang6-s@360.cn> { kraxel: with backward blits (negative pitch) addr is the topmost address, so check it as-is against vram size ] Cc: qemu-stable@nongnu.org Cc: P J P <ppandit@redhat.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Wolfgang Bumiller <w.bumiller@proxmox.com> Fixes: d3532a0db02296e687711b8cdc7791924efccea0 (CVE-2014-8106) Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 1485938101-26602-1-git-send-email-kraxel@redhat.com Reviewed-by: Laszlo Ersek <lersek@redhat.com>
| * | cirrus: fix blit address mask handlingGerd Hoffmann2017-02-011-13/+12Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Apply the cirrus_addr_mask to cirrus_blt_dstaddr and cirrus_blt_srcaddr right after assigning them, in cirrus_bitblt_start(), instead of having this all over the place in the cirrus code, and missing a few places. Reported-by: Wolfgang Bumiller <w.bumiller@proxmox.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 1485338996-17095-1-git-send-email-kraxel@redhat.com
| * | cirrus: allow zero source pitch in pattern fill ropsWolfgang Bumiller2017-02-011-8/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The rops used by cirrus_bitblt_common_patterncopy only use the destination pitch, so the source pitch shoul allowed to be zero and the blit with used for the range check around the source address. Signed-off-by: Wolfgang Bumiller <w.bumiller@proxmox.com> Message-id: 1485272138-23249-1-git-send-email-w.bumiller@proxmox.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
| * | cirrus: handle negative pitch in cirrus_invalidate_region()Wolfgang Bumiller2017-02-011-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | cirrus_invalidate_region() calls memory_region_set_dirty() on a per-line basis, always ranging from off_begin to off_begin+bytesperline. With a negative pitch off_begin marks the top most used address and thus we need to do an initial shift backwards by a line for negative pitches of backward blits, otherwise the first iteration covers the line going from the start offset forwards instead of backwards. Additionally since the start address is inclusive, if we shift by a full `bytesperline` we move to the first address *not* included in the blit, so we only shift by one less than bytesperline. Signed-off-by: Wolfgang Bumiller <w.bumiller@proxmox.com> Message-id: 1485352137-29367-1-git-send-email-w.bumiller@proxmox.com [ kraxel: codestyle fixes ] Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
* | | Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.9-20170202' ↵Peter Maydell2017-02-0263-771/+3867
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into staging ppc patch queue 2017-02-02 This obsoletes ppc-for-2.9-20170112, which had a MacOS build bug. This is a long overdue ppc pull request for qemu-2.9. It's been a long time coming due to some holidays and inconveniently timed problems with testing. So, there's a lot in here: * More POWER9 instruction implementations for TCG * The simpler parts of my CPU compatibility mode cleanup * This changes behaviour to prefer compatibility modes over "raW" mode for new machine type versions * New "40p" machine type which is essentially a modernized and cleaned up "prep". The intention is that it will replace "prep" once it has some more testing and polish. * Add pseries-2.9 machine type * Implement H_SIGNAL_SYS_RESET hypercall * Consolidate the two alternate CPU init paths in pseries by making it always go through CPU core objects to initialize CPU * A number of bugfixes and cleanups * Stop the guest timebase when the guest is stopped under KVM. This makes the guest system clock also stop when paused, which matches the x86 behaviour. * Some preliminary cleanups leading towards implementation of the POWER9 MMU. There are also some changes not strictly related to ppc code, but for its benefit: * Limit the pxi-expander-bridge (PXB) device to x86 guests only (it's essentially a hack to work around historical x86 limitations) * Some additions to the 128-bit math in host_utils, necessary for some of the new instructions. * Revise a number of qtests and enable them for ppc # gpg: Signature made Thu 02 Feb 2017 01:40:16 GMT # gpg: using RSA key 0x6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dgibson/tags/ppc-for-2.9-20170202: (107 commits) hw/ppc/pnv: Use error_report instead of hw_error if a ROM file can't be found ppc/kvm: Handle the "family" CPU via alias instead of registering new types target/ppc/mmu_hash64: Fix incorrect shift value in amr calculation target/ppc/mmu_hash64: Fix printing unsigned as signed int tcg/POWER9: NOOP the cp_abort instruction target/ppc/debug: Print LPCR register value if register exists target-ppc: Add xststdc[sp, dp, qp] instructions target-ppc: Add xvtstdc[sp,dp] instructions target-ppc: Add MMU model check for booke machines ppc: switch to constants within BUILD_BUG_ON target/ppc/cpu-models: Fix/remove bad CPU aliases target/ppc: Remove unused POWERPC_FAMILY(POWER) spapr: clock should count only if vm is running ppc: Remove unused function cpu_ppc601_rtc_init() target/ppc: Add pcr_supported to POWER9 cpu class definition powerpc/cpu-models: rename ISAv3.00 logical PVR definition target-ppc: Add xvcv[hpsp, sphp] instructions target-ppc: Add xsmulqp instruction target-ppc: Add xsdivqp instruction target-ppc: Add xscvsdqp and xscvudqp instructions ... # Conflicts: # hw/pci-bridge/Makefile.objs Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | | hw/ppc/pnv: Use error_report instead of hw_error if a ROM file can't be foundThomas Huth2017-02-011-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | hw_error() is for CPU related errors only (it dumps the CPU registers and calls abort()!), so using error_report() is the better choice of reporting an error in case we simply did not find a file. Signed-off-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * | | ppc/kvm: Handle the "family" CPU via alias instead of registering new typesThomas Huth2017-02-011-13/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When running with KVM on POWER, we are registering a "family" CPU type for the host CPU that we are running on. For example, on all POWER8-compatible hosts, we register a "POWER8" CPU type, so that you can always start QEMU with "-cpu POWER8" there, without the need to know whether you are running on a POWER8, POWER8E or POWER8NVL host machine. However, we also have a "POWER8" CPU alias in the ppc_cpu_aliases list (that is mainly useful for TCG). This leads to two cosmetical drawbacks: If the user runs QEMU with "-cpu ?", we always claim that POWER8 is an "alias for POWER8_v2.0" - which is simply not true when running with KVM on POWER. And when using the 'query-cpu-definitions' QMP call, there are currently two entries for "POWER8", one for the alias, and one for the additional registered type. To solve the two problems, we should rather update the "family" alias instead of registering a new types. We then only have one "POWER8" CPU definition around, an alias, which also points to the right destination. Buglink: https://bugzilla.redhat.com/show_bug.cgi?id=1396536 Signed-off-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * | | target/ppc/mmu_hash64: Fix incorrect shift value in amr calculationSuraj Jitindar Singh2017-02-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We are calculating the authority mask register key value wrong. The pte entry contains the key value with the two upper bits and the three lower bits stored separately. We should use these two portions to get a 5 bit value, not or them together which will only give us a 3 bit value. Fix this. Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * | | target/ppc/mmu_hash64: Fix printing unsigned as signed intSuraj Jitindar Singh2017-02-011-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | We were printing an unsigned value as a signed value, fix this. Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * | | tcg/POWER9: NOOP the cp_abort instructionSuraj Jitindar Singh2017-02-011-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The cp_abort instruction is used to remove the state of an in progress copy paste sequence. POWER9 compilers add this in various places, such as context switches which causes illegal instruction signals since we don't yet implement this instruction. Given there is no implementation of the copy paste facility and that we don't claim to support it, we can just noop this instruction. Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * | | target/ppc/debug: Print LPCR register value if register existsSuraj Jitindar Singh2017-02-011-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It can be useful when debugging to print the LPCR value. Thus we add the LPCR to the "info registers" output if the register had been defined. Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * | | target-ppc: Add xststdc[sp, dp, qp] instructionsNikunj A Dadhania2017-02-015-8/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | xststdcsp: VSX Scalar Test Data Class Single-Precision xststdcdp: VSX Scalar Test Data Class Double-Precision xststdcqp: VSX Scalar Test Data Class Quad-Precision Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * | | target-ppc: Add xvtstdc[sp,dp] instructionsNikunj A Dadhania2017-02-015-2/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | xvtstdcsp: VSX Vector Test Data Class Single-Precision xvtstdcdp: VSX Vector Test Data Class Double-Precision Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * | | target-ppc: Add MMU model check for booke machinesValentin Plotkin2017-02-013-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Machines bamboo, e500 and virtex-ml507 assume a certain MMU model, otherwise resulting in unpredictable behavior. Add apropriate checks into *_init functions. Signed-off-by: Valentin Plotkin <caliborn@sdf.org> [regarding virtex parts] Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * | | ppc: switch to constants within BUILD_BUG_ONMichael S. Tsirkin2017-01-311-8/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We are switching BUILD_BUG_ON to verify that it's parameter is a compile-time constant, and it turns out that some gcc versions (specifically gcc (Ubuntu 5.4.0-6ubuntu1~16.04.4) 5.4.0 20160609) are not smart enough to figure it out for expressions involving local variables. This is harmless but means that the check is ineffective for these platforms. To fix, replace the variable with macros. Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> [dwg: Correct a printf format warning] Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * | | target/ppc/cpu-models: Fix/remove bad CPU aliasesThomas Huth2017-01-311-20/+2Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no CPU model called "7447_v1.2" in our list, so the "7447" alias should point to "7447_v1.1" instead. Let's also remove the "codename" aliases that point to non-implemented CPU models - they are really of no use here. Signed-off-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * | | target/ppc: Remove unused POWERPC_FAMILY(POWER)Thomas Huth2017-01-311-22/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We do not support POWER1 CPUs in QEMU, so it does not make sense to keep this stub around. Signed-off-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * | | spapr: clock should count only if vm is runningLaurent Vivier2017-01-313-23/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a port to ppc of the i386 commit: 00f4d64 kvmclock: clock should count only if vm is running We remove timebase_post_load function, and use the VM state change handler to save and restore the guest_timebase (on stop and continue). We keep timebase_pre_save to reduce the clock difference on migration like in: 6053a86 kvmclock: reduce kvmclock difference on migration Time base offset has originally been introduced by commit 98a8b52 spapr: Add support for time base offset migration So while VM is paused, the time is stopped. This allows to have the same result with date (based on Time Base Register) and hwclock (based on "get-time-of-day" RTAS call). Moreover in TCG mode, the Time Base is always paused, so this patch also adjust the behavior between TCG and KVM. VM state field "time_of_the_day_ns" is now useless but we keep it to be able to migrate to older version of the machine. As vmstate_ppc_timebase structure (with timebase_pre_save() and timebase_post_load() functions) was only used by vmstate_spapr, we register the VM state change handler only in ppc_spapr_init(). Signed-off-by: Laurent Vivier <lvivier@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * | | ppc: Remove unused function cpu_ppc601_rtc_init()Thomas Huth2017-01-311-7/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | It is completely unused, thus it can be removed without problems. Signed-off-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * | | target/ppc: Add pcr_supported to POWER9 cpu class definitionSuraj Jitindar Singh2017-01-312-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pcr_supported is used to define the supported PCR values for a given processor. A POWER9 processor can support 3.00, 2.07, 2.06 and 2.05 compatibility modes, thus we set this accordingly. Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * | | powerpc/cpu-models: rename ISAv3.00 logical PVR definitionSuraj Jitindar Singh2017-01-311-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This logical PVR value now corresponds to ISA version 3.00 so rename it accordingly. Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * | | target-ppc: Add xvcv[hpsp, sphp] instructionsNikunj A Dadhania2017-01-314-9/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | xvcvhpsp: VSX Vector Convert Half Precision to Single Precision xvcvsphp: VSX Vector Convert Single Precision to Half Precision Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * | | target-ppc: Add xsmulqp instructionBharata B Rao2017-01-314-0/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | xsmulqp: VSX Scalar Multiply Quad-Precision Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com> Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * | | target-ppc: Add xsdivqp instructionBharata B Rao2017-01-314-0/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | xsdivqp: VSX Scalar Divide Quad-Precision Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com> Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * | | target-ppc: Add xscvsdqp and xscvudqp instructionsBharata B Rao2017-01-314-0/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | xscvsdqp: VSX Scalar Convert Signed Doubleword format to Quad-Precision format xscvudqp: VSX Scalar Convert Unsigned Doubleword format to Quad-Precision format Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com> Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * | | target-ppc: Use ppc_vsr_t.f128 in xscmp[o,u,exp]qpBharata B Rao2017-01-311-12/+8Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | xscmpoqp, xscmpuqp & xscmpexpqp were added before f128 field was introduced in ppc_vsr_t. Now that we have it, use it instead of generating the 128 bit float using two 64bit fields. Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com> Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * | | ppc: Implement bcdutrunc. instructionJose Ricardo Ziviani2017-01-314-1/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | bcdutrunc. Decimal unsigned truncate. Works like bcdtrunc. with unsigned BCD numbers. Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * | | ppc: Implement bcdtrunc. instructionJose Ricardo Ziviani2017-01-314-2/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | bcdtrunc.: Decimal integer truncate. Given a BCD number in vrb and the number of bytes to truncate in vra, the return register will have vrb with such bits truncated. Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * | | ppc/prep: update MAINTAINERS fileHervé Poussineau2017-01-311-1/+4
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * | | target-ppc: Add xscvqps[d,w]z instructionsBharata B Rao2017-01-314-0/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | xscvqpsdz: VSX Scalar truncate & Convert Quad-Precision format to Signed Doubleword format xscvqpswz: VSX Scalar truncate & Convert Quad-Precision format to Signed Word format Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com> Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * | | target-ppc: Add xvxsigdp instructionNikunj A Dadhania2017-01-312-0/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | xvxsigdp: VSX Vector Extract Significand Dual Precision Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * | | target-ppc: Add xvxsigsp instructionNikunj A Dadhania2017-01-314-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | xvxsigsp: VSX Vector Extract Significand Single Precision Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2024-12-22 16:36:07 +0100