summaryrefslogtreecommitdiffstats
Commit message (Expand)AuthorAgeFilesLines
* Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-next-280519-2...Peter Maydell2019-05-2858-580/+2178
|\
| * tests/qemu-iotests: re-format output to for make check-blockAlex Bennée2019-05-281-60/+117
| * tests/qemu-iotests/group: Re-use the "auto" group for tests that can always runThomas Huth2019-05-281-82/+95
| * Makefile.target: support per-target coverage reportsAlex Bennée2019-05-281-0/+16
| * Makefile: include per-target build directories in coverage reportAlex Bennée2019-05-281-1/+3
| * Makefile: fix coverage-report reference to BUILD_DIRAlex Bennée2019-05-281-1/+1
| * .travis.yml: enable aarch64-softmmu and alpha-softmmu tcg testsAlex Bennée2019-05-281-1/+1
| * tests/tcg/alpha: add system boot.SRichard Henderson2019-05-284-0/+576
| * tests/tcg/multiarch: expand system memory test to cover moreAlex Bennée2019-05-283-72/+282
| * tests/tcg/minilib: support %c format charAlex Bennée2019-05-281-0/+3
| * tests/tcg/multiarch: move the system memory testAlex Bennée2019-05-281-0/+0
| * tests/tcg/aarch64: add system boot.SAlex Bennée2019-05-283-0/+295
| * editorconfig: add settings for .s/.S filesAlex Bennée2019-05-281-0/+5
| * tests/tcg/multiarch: add hello world system testAlex Bennée2019-05-282-1/+1
| * tests/tcg/multiarch: add support for multiarch system testsAlex Bennée2019-05-282-0/+15
| * tests/docker: Test more components on the Fedora default imagePhilippe Mathieu-Daudé2019-05-281-0/+7
| * tests/docker: add ubuntu 18.04Gerd Hoffmann2019-05-281-0/+57
| * MAINTAINERS: update for semihostings new homeAlex Bennée2019-05-281-0/+7
| * target/mips: convert UHI_plog to use common semihosting codeAlex Bennée2019-05-281-6/+6
| * target/mips: only build mips-semi for softmmuAlex Bennée2019-05-283-1/+12
| * target/arm: correct return values for WRITE/READ in arm-semiAlex Bennée2019-05-281-8/+12
| * target/arm: add LOG_UNIMP messages to arm-semiAlex Bennée2019-05-281-2/+3
| * target/arm: use the common interface for WRITE0/WRITEC in arm-semiAlex Bennée2019-05-283-25/+30
| * target/arm: fixup some of the commentary for arm-semiAlex Bennée2019-05-281-9/+31
| * semihosting: enable chardev backed output for consoleAlex Bennée2019-05-286-3/+51
| * semihosting: implement a semihosting consoleAlex Bennée2019-05-283-0/+116
| * semihosting: introduce CONFIG_SEMIHOSTINGAlex Bennée2019-05-2811-1/+82
| * semihosting: move semihosting configuration into its own directoryAlex Bennée2019-05-2819-139/+186
* | Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-may-19-2019-v...Peter Maydell2019-05-2810-210/+922
|\ \
| * | BootLinuxSshTest: Test some userspace commands on MaltaPhilippe Mathieu-Daudé2019-05-263-0/+232
| * | target/mips: realign comments to fix checkpatch warningsJules Irenge2019-05-261-12/+22
| * | target/mips: add or remove space to fix checkpatch errorsJules Irenge2019-05-261-81/+94
| * | linux-user: fix __NR_semtimedop undeclared errorLaurent Vivier2019-05-261-8/+16
| * | mips: Decide to map PAGE_EXEC in map_addressJakub Jermář2019-05-261-5/+8
| * | target/mips: Refactor and fix INSERT.<B|H|W|D> instructionsMateja Marjanovic2019-05-263-18/+71
| * | target/mips: Refactor and fix COPY_U.<B|H|W> instructionsMateja Marjanovic2019-05-263-21/+59
| * | target/mips: Refactor and fix COPY_S.<B|H|W|D> instructionsMateja Marjanovic2019-05-263-21/+67
| * | target/mips: Fix MSA instructions ST.<B|H|W|D> on big endian hostMateja Marjanovic2019-05-261-20/+180
| * | target/mips: Fix MSA instructions LD.<B|H|W|D> on big endian hostMateja Marjanovic2019-05-261-20/+168
| * | target/mips: Make the results of MOD_<U|S>.<B|H|W|D> the same as on hardwareMateja Marjanovic2019-05-261-2/+2
| * | target/mips: Make the results of DIV_<U|S>.<B|H|W|D> the same as on hardwareMateja Marjanovic2019-05-261-2/+3
| |/
* | Merge remote-tracking branch 'remotes/palmer/tags/riscv-for-master-4.1-sf0' i...Peter Maydell2019-05-2827-514/+1053
|\ \
| * | target/riscv: Only flush TLB if SATP.ASID changesJonathan Behrens2019-05-241-1/+3
| * | target/riscv: More accurate handling of `sip` CSRJonathan Behrens2019-05-241-2/+5
| * | target/riscv: Add checks for several RVC reserved operandsRichard Henderson2019-05-242-3/+14
| * | target/riscv: Add the HGATP register masksAlistair Francis2019-05-241-0/+11
| * | target/riscv: Add the HSTATUS register masksAlistair Francis2019-05-241-0/+18
| * | target/riscv: Add Hypervisor CSR macrosAlistair Francis2019-05-241-3/+6
| * | target/riscv: Allow setting mstatus virtulisation bitsAlistair Francis2019-05-241-9/+8Star
| * | target/riscv: Add the MPV and MTL mstatus bitsAlistair Francis2019-05-241-3/+2Star