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* hw/display/pxa2xx_lcd: Remove dest_width state fieldPeter Maydell2021-03-141-9/+11
| | | | | | | | | Since the dest_width is now always 4 because the output surface is 32bpp, we can replace the dest_width state field with a constant. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20210211141515.8755-6-peter.maydell@linaro.org
* hw/display/pxa2xx_lcd: Remove dead code for non-32-bpp surfacesPeter Maydell2021-03-141-62/+17Star
| | | | | | | | | | | For a long time now the UI layer has guaranteed that the console surface is always 32 bits per pixel. Remove the legacy dead code from the pxa2xx_lcd display device which was handling the possibility that the console surface was some other format. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20210211141515.8755-5-peter.maydell@linaro.org
* hw/display/pl110: Remove use of BITS from pl110_template.hPeter Maydell2021-03-142-68/+65Star
| | | | | | | | | | BITS is always 32, so remove all uses of it from the template header, by dropping the trailing '32' from the draw function names and not constructing the name of rgb_to_pixel32() via the glue() macro. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20210211141515.8755-4-peter.maydell@linaro.org
* hw/display/pl110: Pull included-once parts of template header into pl110.cPeter Maydell2021-03-142-99/+80Star
| | | | | | | | | | | | | | | | The pl110_template.h header has a doubly-nested multiple-include pattern: * pl110.c includes it once for each host bit depth (now always 32) * every time it is included, it includes itself 6 times, to account for multiple guest device pixel and byte orders Now we only have to deal with 32-bit host bit depths, we can move the code corresponding to the outer layer of this double-nesting to be directly in pl110.c and reduce the template header to a single layer of nesting. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20210211141515.8755-3-peter.maydell@linaro.org
* hw/display/pl110: Remove dead code for non-32-bpp surfacesPeter Maydell2021-03-141-45/+8Star
| | | | | | | | | | | For a long time now the UI layer has guaranteed that the console surface is always 32 bits per pixel. Remove the legacy dead code from the pl110 display device which was handling the possibility that the console surface was some other format. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20210211141515.8755-2-peter.maydell@linaro.org
* tests/qtest: Test PWM fan RPM using MFT in PWM testHao Wu2021-03-121-6/+199
| | | | | | | | | | | | | | This patch adds testing of PWM fan RPMs in the existing npcm7xx pwm test. It tests whether the MFT module can measure correct fan values for a PWM fan in NPCM7XX boards. Reviewed-by: Doug Evans <dje@google.com> Reviewed-by: Tyrone Ting <kfting@nuvoton.com> Signed-off-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20210311180855.149764-6-wuhaotsh@google.com [PMM: fixed format strings for printing uint64_t] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm: Connect PWM fans in NPCM7XX boardsHao Wu2021-03-122-1/+109
| | | | | | | | | | | | | | | | This patch adds fan_splitters (split IRQs) in NPCM7XX boards. Each fan splitter corresponds to 1 PWM output and can connect to multiple fan inputs (MFT devices). In NPCM7XX boards(NPCM750 EVB and Quanta GSJ boards), we initializes these splitters and connect them to their corresponding modules according their specific device trees. Reviewed-by: Doug Evans <dje@google.com> Reviewed-by: Tyrone Ting <kfting@nuvoton.com> Signed-off-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20210311180855.149764-5-wuhaotsh@google.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm: Add MFT device to NPCM7xx SocHao Wu2021-03-123-9/+40
| | | | | | | | | | | | This patch adds the recently implemented MFT device to the NPCM7XX SoC file. Reviewed-by: Doug Evans <dje@google.com> Reviewed-by: Tyrone Ting <kfting@nuvoton.com> Signed-off-by: Hao Wu <wuhaotsh@google.com> Message-id: 20210311180855.149764-4-wuhaotsh@google.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/misc: Add NPCM7XX MFT ModuleHao Wu2021-03-124-0/+619
| | | | | | | | | | | | | | | | | | | | | | This patch implements Multi Function Timer (MFT) module for NPCM7XX. This module is mainly used to configure PWM fans. It has just enough functionality to make the PWM fan kernel module work. The module takes two input, the max_rpm of a fan (modifiable via QMP) and duty cycle (a GPIO from the PWM module.) The actual measured RPM is equal to max_rpm * duty_cycle / NPCM7XX_PWM_MAX_DUTY. The RPM is measured as a counter compared to a prescaled input clock. The kernel driver reads this counter and report to user space. Refs: https://github.com/torvalds/linux/blob/master/drivers/hwmon/npcm750-pwm-fan.c Reviewed-by: Doug Evans <dje@google.com> Reviewed-by: Tyrone Ting <kfting@nuvoton.com> Signed-off-by: Hao Wu <wuhaotsh@google.com> Message-id: 20210311180855.149764-3-wuhaotsh@google.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/misc: Add GPIOs for duty in NPCM7xx PWMHao Wu2021-03-122-1/+7
| | | | | | | | | | | | | | | This patch adds GPIOs in NPCM7xx PWM module for its duty values. The purpose of this is to connect it to the MFT module to provide an input for measuring a PWM fan's RPM. Each PWM module has NPCM7XX_PWM_PER_MODULE of GPIOs, each one corresponds to one PWM instance and can connect to multiple fan instances in MFT. Reviewed-by: Doug Evans <dje@google.com> Reviewed-by: Tyrone Ting <kfting@nuvoton.com> Signed-off-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20210311180855.149764-2-wuhaotsh@google.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm/virt: KVM: The IPA lower bound is 32Andrew Jones2021-03-123-10/+23
| | | | | | | | | | | | | | | | | | | | | The virt machine already checks KVM_CAP_ARM_VM_IPA_SIZE to get the upper bound of the IPA size. If that bound is lower than the highest possible GPA for the machine, then QEMU will error out. However, the IPA is set to 40 when the highest GPA is less than or equal to 40, even when KVM may support an IPA limit as low as 32. This means KVM may fail the VM creation unnecessarily. Additionally, 40 is selected with the value 0, which means use the default, and that gets around a check in some versions of KVM, causing a difficult to debug fail. Always use the IPA size that corresponds to the highest possible GPA, unless it's lower than 32, in which case use 32. Also, we must still use 0 when KVM only supports the legacy fixed 40 bit IPA. Suggested-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Marc Zyngier <maz@kernel.org> Message-id: 20210310135218.255205-3-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* accel: kvm: Fix kvm_type invocationAndrew Jones2021-03-122-0/+3
| | | | | | | | | | | | | | | | Prior to commit f2ce39b4f067 a MachineClass kvm_type method only needed to be registered to ensure it would be executed. With commit f2ce39b4f067 a kvm-type machine property must also be specified. hw/arm/virt relies on the kvm_type method to pass its selected IPA limit to KVM, but this is not exposed as a machine property. Restore the previous functionality of invoking kvm_type when it's present. Fixes: f2ce39b4f067 ("vl: make qemu_get_machine_opts static") Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-id: 20210310135218.255205-2-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/timer/sse-timer: Propagate eventual error in sse_timer_realize()Philippe Mathieu-Daudé2021-03-121-0/+1
| | | | | | | | | | | | If the SSECounter link is absent, we set an error message in sse_timer_realize() but forgot to propagate this error. Add the missing 'return'. Fixes: CID 1450755 (Null pointer dereferences) Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210312001845.1562670-1-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* tests/acceptance: drop ARMBIAN_ARTIFACTS_CACHED condition for orangepi-pc, ↵Niek Linnenbank2021-03-122-14/+0Star
| | | | | | | | | | | | | | | | | | | | | | cubieboard tests Previously the ARMBIAN_ARTIFACTS_CACHED pre-condition was added to allow running tests that have already existing armbian.com artifacts stored in the local avocado cache, but do not have working URLs to download a fresh copy. At this time of writing the URLs for artifacts on the armbian.com server are updated and working. Any future broken URLs will result in a skipped acceptance test, for example: (1/5) tests/acceptance/boot_linux_console.py:BootLinuxConsole.test_arm_orangepi: CANCEL: Missing asset https://apt.armbian.com/pool/main/l/linux-4.20.7-sunxi/linux-image-dev-sunxi_5.75_armhf.deb (0.53 s) This commits removes the ARMBIAN_ARTIFACTS_CACHED pre-condition such that the acceptance tests for the orangepi-pc and cubieboard machines can run. Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com> Reviewed-by: Willian Rampazzo <willianr@redhat.com> Message-id: 20210310195820.21950-6-nieklinnenbank@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* tests/acceptance: update sunxi kernel from armbian to 5.10.16Niek Linnenbank2021-03-122-24/+24
| | | | | | | | | | | | | | | | | | The linux kernel 4.20.7 binary for sunxi has been removed from apt.armbian.com: $ ARMBIAN_ARTIFACTS_CACHED=yes AVOCADO_ALLOW_LARGE_STORAGE=yes avocado --show=app,console run -t machine:orangepi-pc tests/acceptance/boot_linux_console.py Fetching asset from tests/acceptance/boot_linux_console.py:BootLinuxConsole.test_arm_orangepi ... (1/6) tests/acceptance/boot_linux_console.py:BootLinuxConsole.test_arm_orangepi: CANCEL: Missing asset https://apt.armbian.com/pool/main/l/linux-4.20.7-sunxi/linux-image-dev-sunxi_5.75_armhf.deb (0.55 s) This commit updates the sunxi kernel to 5.10.16 for the acceptance tests of the orangepi-pc and cubieboard machines. Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com> Reviewed-by: Willian Rampazzo <willianr@redhat.com> Message-id: 20210310195820.21950-5-nieklinnenbank@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* tests/acceptance/boot_linux_console: change URL for ↵Niek Linnenbank2021-03-121-1/+1
| | | | | | | | | | | | | | | | | test_arm_orangepi_bionic_20_08 Update the download URL of the Armbian 20.08 Bionic image for test_arm_orangepi_bionic_20_08 of the orangepi-pc machine. The archive.armbian.com URL contains more images and should keep stable for a longer period of time than dl.armbian.com. Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Willian Rampazzo <willianr@redhat.com> Message-id: 20210310195820.21950-4-nieklinnenbank@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* tests/acceptance/boot_linux_console: remove Armbian 19.11.3 bionic test for ↵Niek Linnenbank2021-03-121-49/+23Star
| | | | | | | | | | | | | | | orangepi-pc machine The image for Armbian 19.11.3 bionic has been removed from the armbian server. Without the image as input the test arm_orangepi_bionic_19_11 cannot run. This commit removes the test completely and merges the code of the generic function do_test_arm_orangepi_uboot_armbian back with the 20.08 test. Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com> Reviewed-by: Willian Rampazzo <willianr@redhat.com> Message-id: 20210310195820.21950-3-nieklinnenbank@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/net/allwinner-sun8i-emac: traverse transmit queue using TX_CUR_DESC ↵Niek Linnenbank2021-03-121-26/+32
| | | | | | | | | | | | | | | | | | | | | | | | | register value Currently the emulated EMAC for sun8i always traverses the transmit queue from the head when transferring packets. It searches for a list of consecutive descriptors whichs are flagged as ready for processing and transmits their payloads accordingly. The controller stops processing once it finds a descriptor that is not marked ready. While the above behaviour works in most situations, it is not the same as the actual EMAC in hardware. Actual hardware uses the TX_CUR_DESC register value to keep track of the last position in the transmit queue and continues processing from that position when software triggers the start of DMA processing. The currently emulated behaviour can lead to packet loss on transmit when software fills the transmit queue with ready descriptors that overlap the tail of the circular list. This commit modifies the emulated EMAC for sun8i such that it processes the transmit queue using the TX_CUR_DESC register in the same way as hardware. Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210310195820.21950-2-nieklinnenbank@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* target/arm: Update sve reduction vs simd_descRichard Henderson2021-03-122-2/+2
| | | | | | | | | | | | | | | With the reduction operations, we intentionally increase maxsz to the next power of 2, so as to fill out the reduction tree correctly. Since e2e7168a214b, oprsz must equal maxsz, with exceptions for small vectors, so this triggers an assertion for vector sizes > 32 that are not themselves a power of 2. Pass the power-of-two value in the simd_data field instead. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210309155305.11301-9-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* target/arm: Update WHILE for PREDDESCRichard Henderson2021-03-122-5/+6
| | | | | | | | | | Since b64ee454a4a0, all predicate operations should be using these field macros for predicates. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210309155305.11301-8-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* target/arm: Update CNTP for PREDDESCRichard Henderson2021-03-122-6/+6
| | | | | | | | | | Since b64ee454a4a0, all predicate operations should be using these field macros for predicates. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210309155305.11301-7-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* target/arm: Update BRKA, BRKB, BRKN for PREDDESCRichard Henderson2021-03-122-18/+16Star
| | | | | | | | | | Since b64ee454a4a0, all predicate operations should be using these field macros for predicates. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210309155305.11301-6-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* target/arm: Update find_last_active for PREDDESCRichard Henderson2021-03-122-7/+6Star
| | | | | | | | | | Since b64ee454a4a0, all predicate operations should be using these field macros for predicates. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210309155305.11301-5-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* target/arm: Fix sve_punpk_p vs odd vector lengthsRichard Henderson2021-03-121-2/+2
| | | | | | | | | | Wrote too much with punpk1 with vl % 512 != 0. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210309155305.11301-4-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* target/arm: Fix sve_zip_p vs odd vector lengthsRichard Henderson2021-03-121-11/+14
| | | | | | | | | | | | | | | | Wrote too much with low-half zip (zip1) with vl % 512 != 0. Adjust all of the x + (y << s) to x | (y << s) as a style fix. We only ever have exact overlap between D, M, and N. Therefore we only need a single temporary, and we do not need to check for partial overlap. Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210309155305.11301-3-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* target/arm: Fix sve_uzp_p vs odd vector lengthsRichard Henderson2021-03-121-9/+21
| | | | | | | | | | | | | | | | Missed out on compressing the second half of a predicate with length vl % 512 > 256. Adjust all of the x + (y << s) to x | (y << s) as a general style fix. Drop the extract64 because the input uint64_t are known to be already zero-extended from the current size of the predicate. Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210309155305.11301-2-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm/smmuv3: Uniformize sid tracesEric Auger2021-03-121-12/+12
| | | | | | | | | Convert all sid printouts to sid=0x%x. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20210309102742.30442-8-eric.auger@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm/smmuv3: Fix SMMU_CMD_CFGI_STE_RANGE handlingEric Auger2021-03-122-14/+25
| | | | | | | | | | | | | | | | If the whole SID range (32b) is invalidated (SMMU_CMD_CFGI_ALL), @end overflows and we fail to handle the command properly. Once this gets fixed, the current code really is awkward in the sense it loops over the whole range instead of removing the currently cached configs through a hash table lookup. Fix both the overflow and the lookup. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20210309102742.30442-7-eric.auger@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm/smmuv3: Enforce invalidation on a power of two rangeEric Auger2021-03-122-15/+37
| | | | | | | | | | | | | | | | | | | | As of today, the driver can invalidate a number of pages that is not a power of 2. However IOTLB unmap notifications and internal IOTLB invalidations work with masks leading to erroneous invalidations. In case the range is not a power of 2, split invalidations into power of 2 invalidations. When looking for a single page entry in the vSMMU internal IOTLB, let's make sure that if the entry is not found using a g_hash_table_remove() we iterate over all the entries to find a potential range that overlaps it. Signed-off-by: Eric Auger <eric.auger@redhat.com> Message-id: 20210309102742.30442-6-eric.auger@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm/smmu-common: Fix smmu_iotlb_inv_iova when asid is not setEric Auger2021-03-121-1/+1
| | | | | | | | | | | | If the asid is not set, do not attempt to locate the key directly as all inserted keys have a valid asid. Use g_hash_table_foreach_remove instead. Signed-off-by: Eric Auger <eric.auger@redhat.com> Message-id: 20210309102742.30442-5-eric.auger@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* virtio-iommu: Handle non power of 2 range invalidationsEric Auger2021-03-121-3/+16
| | | | | | | | | | | | | | Unmap notifiers work with an address mask assuming an invalidation range of a power of 2. Nothing mandates this in the VIRTIO-IOMMU spec. So in case the range is not a power of 2, split it into several invalidations. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Peter Xu <peterx@redhat.com> Message-id: 20210309102742.30442-4-eric.auger@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* dma: Introduce dma_aligned_pow2_mask()Eric Auger2021-03-123-23/+45
| | | | | | | | | | | | | | | | | | | | | Currently get_naturally_aligned_size() is used by the intel iommu to compute the maximum invalidation range based on @size which is a power of 2 while being aligned with the @start address and less than the maximum range defined by @gaw. This helper is also useful for other iommu devices (virtio-iommu, SMMUv3) to make sure IOMMU UNMAP notifiers only are called with power of 2 range sizes. Let's move this latter into dma-helpers.c and rename it into dma_aligned_pow2_mask(). Also rewrite the helper so that it accomodates UINT64_MAX values for the size mask and max mask. It now returns a mask instead of a size. Change the caller. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Peter Xu <peterx@redhat.com> Message-id: 20210309102742.30442-3-eric.auger@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* intel_iommu: Fix mask may be uninitialized in vtd_context_device_invalidateEric Auger2021-03-121-0/+2
| | | | | | | | | | | | | | | | | With -Werror=maybe-uninitialized configuration we get ../hw/i386/intel_iommu.c: In function ‘vtd_context_device_invalidate’: ../hw/i386/intel_iommu.c:1888:10: error: ‘mask’ may be used uninitialized in this function [-Werror=maybe-uninitialized] 1888 | mask = ~mask; | ~~~~~^~~~~~~ Add a g_assert_not_reached() to avoid the error. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Peter Xu <peterx@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20210309102742.30442-2-eric.auger@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm: versal: Add support for the XRAMsEdgar E. Iglesias2021-03-123-0/+50
| | | | | | | | | | Connect the support for the Versal Accelerator RAMs (XRAMs). Reviewed-by: Luc Michel <luc@lmichel.fr> Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20210308224637.2949533-3-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/misc: versal: Add a model of the XRAM controllerEdgar E. Iglesias2021-03-123-0/+351
| | | | | | | | | | | | | Add a model of the Xilinx Versal Accelerator RAM (XRAM). This is mainly a stub to make firmware happy. The size of the RAMs can be probed. The interrupt mask logic is modelled but none of the interrups will ever be raised unless injected. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20210308224637.2949533-2-edgar.iglesias@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* Merge remote-tracking branch ↵Peter Maydell2021-03-1179-134/+147
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'remotes/vivier2/tags/trivial-branch-for-6.0-pull-request' into staging Pull request # gpg: Signature made Wed 10 Mar 2021 21:56:09 GMT # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/trivial-branch-for-6.0-pull-request: (22 commits) sysemu: Let VMChangeStateHandler take boolean 'running' argument sysemu/runstate: Let runstate_is_running() return bool hw/lm32/Kconfig: Have MILKYMIST select LM32_DEVICES hw/lm32/Kconfig: Rename CONFIG_LM32 -> CONFIG_LM32_DEVICES hw/lm32/Kconfig: Introduce CONFIG_LM32_EVR for lm32-evr/uclinux boards qemu-common.h: Update copyright string to 2021 tests/fp/fp-test: Replace the word 'blacklist' qemu-options: Replace the word 'blacklist' seccomp: Replace the word 'blacklist' scripts/tracetool: Replace the word 'whitelist' ui: Replace the word 'whitelist' virtio-gpu: Adjust code space style exec/memory: Use struct Object typedef fuzz-test: remove unneccessary debugging flags net: Use id_generate() in the network subsystem, too MAINTAINERS: Fix the location of tools manuals vhost_user_gpu: Drop dead check for g_malloc() failure backends/dbus-vmstate: Fix short read error handling target/hexagon/gen_tcg_funcs: Fix a typo hw/elf_ops: Fix a typo ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * sysemu: Let VMChangeStateHandler take boolean 'running' argumentPhilippe Mathieu-Daudé2021-03-0941-43/+49
| | | | | | | | | | | | | | | | | | | | | | The 'running' argument from VMChangeStateHandler does not require other value than 0 / 1. Make it a plain boolean. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Acked-by: David Gibson <david@gibson.dropbear.id.au> Message-Id: <20210111152020.1422021-3-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
| * sysemu/runstate: Let runstate_is_running() return boolPhilippe Mathieu-Daudé2021-03-092-2/+2
| | | | | | | | | | | | | | | | | | | | | | runstate_check() returns a boolean. runstate_is_running() returns what runstate_check() returns, also a boolean. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20210111152020.1422021-2-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
| * hw/lm32/Kconfig: Have MILKYMIST select LM32_DEVICESPhilippe Mathieu-Daudé2021-03-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Milkymist board requires more than the PTIMER. Directly select the LM32_DEVICES. This fixes: /usr/bin/ld: libqemu-lm32-softmmu.fa.p/target_lm32_gdbstub.c.o: in function `lm32_cpu_gdb_read_register': target/lm32/gdbstub.c:46: undefined reference to `lm32_pic_get_im' target/lm32/gdbstub.c:48: undefined reference to `lm32_pic_get_ip' libqemu-lm32-softmmu.fa.p/target_lm32_op_helper.c.o: in function `helper_wcsr_im': target/lm32/op_helper.c:107: undefined reference to `lm32_pic_set_im' libqemu-lm32-softmmu.fa.p/target_lm32_op_helper.c.o: in function `helper_wcsr_ip': target/lm32/op_helper.c:114: undefined reference to `lm32_pic_set_ip' libqemu-lm32-softmmu.fa.p/target_lm32_op_helper.c.o: in function `helper_wcsr_jtx': target/lm32/op_helper.c:120: undefined reference to `lm32_juart_set_jtx' libqemu-lm32-softmmu.fa.p/target_lm32_op_helper.c.o: in function `helper_wcsr_jrx': target/lm32/op_helper.c:125: undefined reference to `lm32_juart_set_jrx' libqemu-lm32-softmmu.fa.p/target_lm32_translate.c.o: in function `lm32_cpu_dump_state': target/lm32/translate.c:1161: undefined reference to `lm32_pic_get_ip' target/lm32/translate.c:1161: undefined reference to `lm32_pic_get_im' Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210221225626.2589247-4-f4bug@amsat.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
| * hw/lm32/Kconfig: Rename CONFIG_LM32 -> CONFIG_LM32_DEVICESPhilippe Mathieu-Daudé2021-03-094-6/+6
| | | | | | | | | | | | | | | | | | | | | | We want to be able to use the 'LM32' config for architecture specific features. As CONFIG_LM32 is only used to select peripherals, rename it CONFIG_LM32_DEVICES. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210221225626.2589247-3-f4bug@amsat.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
| * hw/lm32/Kconfig: Introduce CONFIG_LM32_EVR for lm32-evr/uclinux boardsPhilippe Mathieu-Daudé2021-03-093-3/+7
| | | | | | | | | | | | | | | | | | | | | | We want to be able to use the 'LM32' config for architecture specific features. Introduce CONFIG_LM32_EVR to select the lm32-evr / lm32-uclinux boards. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210221225626.2589247-2-f4bug@amsat.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
| * qemu-common.h: Update copyright string to 2021Peter Maydell2021-03-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | Update the common copyright string that we use in -version reports, About dialogs, etc, to 2021. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20210309162258.28633-1-peter.maydell@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
| * tests/fp/fp-test: Replace the word 'blacklist'Philippe Mathieu-Daudé2021-03-091-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Follow the inclusive terminology from the "Conscious Language in your Open Source Projects" guidelines [*] and replace the word "blacklist" appropriately. [*] https://github.com/conscious-lang/conscious-lang-docs/blob/main/faq.md Acked-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210303184644.1639691-6-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
| * qemu-options: Replace the word 'blacklist'Philippe Mathieu-Daudé2021-03-091-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Follow the inclusive terminology from the "Conscious Language in your Open Source Projects" guidelines [*] and replace the word "blacklist" appropriately. [*] https://github.com/conscious-lang/conscious-lang-docs/blob/main/faq.md Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210303184644.1639691-5-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
| * seccomp: Replace the word 'blacklist'Philippe Mathieu-Daudé2021-03-091-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Follow the inclusive terminology from the "Conscious Language in your Open Source Projects" guidelines [*] and replace the word "blacklist" appropriately. [*] https://github.com/conscious-lang/conscious-lang-docs/blob/main/faq.md Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Acked-by: Eduardo Otubo <otubo@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210303184644.1639691-4-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
| * scripts/tracetool: Replace the word 'whitelist'Philippe Mathieu-Daudé2021-03-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Follow the inclusive terminology from the "Conscious Language in your Open Source Projects" guidelines [*] and replace the words "whitelist" appropriately. [*] https://github.com/conscious-lang/conscious-lang-docs/blob/main/faq.md Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Message-Id: <20210303184644.1639691-3-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
| * ui: Replace the word 'whitelist'Philippe Mathieu-Daudé2021-03-092-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Follow the inclusive terminology from the "Conscious Language in your Open Source Projects" guidelines [*] and replace the words "whitelist" appropriately. [*] https://github.com/conscious-lang/conscious-lang-docs/blob/main/faq.md Reviewed-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210303184644.1639691-2-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
| * virtio-gpu: Adjust code space stylelijiejun2021-03-091-2/+1Star
| | | | | | | | | | | | | | | | | | Fix code style. Operator needs align with eight spaces, and delete line space. Signed-off-by: lijiejun <a_lijiejun@163.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <1615292050-108748-1-git-send-email-a_lijiejun@163.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
| * exec/memory: Use struct Object typedefPhilippe Mathieu-Daudé2021-03-094-24/+24
| | | | | | | | | | | | | | | | | | | | | | | | We forward-declare Object typedef in "qemu/typedefs.h" since commit ca27b5eb7cd ("qom/object: Move Object typedef to 'qemu/typedefs.h'"). Use it everywhere to make the code simpler. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20210225182003.3629342-1-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
| * fuzz-test: remove unneccessary debugging flagsAlexander Bulekov2021-03-091-2/+1Star
| | | | | | | | | | | | | | | | | | | | | | | | These flags cause the output to look strange for 'make check', and they aren't needed to reproduce bugs, if they reappear. Suggested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210216181316.794276-1-alxndr@bu.edu> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2025-01-02 02:40:12 +0100