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* target-ppc: Add xsmulqp instructionBharata B Rao2017-01-314-0/+38
* target-ppc: Add xsdivqp instructionBharata B Rao2017-01-314-0/+39
* target-ppc: Add xscvsdqp and xscvudqp instructionsBharata B Rao2017-01-314-0/+31
* target-ppc: Use ppc_vsr_t.f128 in xscmp[o,u,exp]qpBharata B Rao2017-01-311-12/+8Star
* ppc: Implement bcdutrunc. instructionJose Ricardo Ziviani2017-01-314-1/+57
* ppc: Implement bcdtrunc. instructionJose Ricardo Ziviani2017-01-314-2/+45
* ppc/prep: update MAINTAINERS fileHervé Poussineau2017-01-311-1/+4
* target-ppc: Add xscvqps[d,w]z instructionsBharata B Rao2017-01-314-0/+46
* target-ppc: Add xvxsigdp instructionNikunj A Dadhania2017-01-312-0/+41
* target-ppc: Add xvxsigsp instructionNikunj A Dadhania2017-01-314-0/+24
* target-ppc: Add xvxexpdp instructionNikunj A Dadhania2017-01-312-0/+18
* target-ppc: Add xvxexpsp instructionNikunj A Dadhania2017-01-312-0/+18
* target-ppc: Add xviexpdp instructionNikunj A Dadhania2017-01-312-0/+27
* target-ppc: Add xviexpsp instructionNikunj A Dadhania2017-01-312-0/+28
* target-ppc: Add xsiexpqp instructionNikunj A Dadhania2017-01-312-0/+23
* target-ppc: Add xsiexpdp instructionNikunj A Dadhania2017-01-312-0/+21
* ppc: Implement bcdsr. instructionJose Ricardo Ziviani2017-01-314-0/+52
* ppc: Implement bcdus. instructionJose Ricardo Ziviani2017-01-314-1/+46
* ppc: Implement bcds. instructionJose Ricardo Ziviani2017-01-314-1/+46
* host-utils: Implement unsigned quadword left/right shift and unit testsJose Ricardo Ziviani2017-01-315-1/+235
* host-utils: Move 128-bit guard macro to .c fileJose Ricardo Ziviani2017-01-312-1/+3
* softfloat: Fix the default qNAN for target-ppcBharata B Rao2017-01-311-1/+1
* target-ppc: xscvqpdp zero VSRNikunj A Dadhania2017-01-311-1/+1
* ppc: Fix a warning in bcdcfz code and improve BCD_DIG_BYTE macroJose Ricardo Ziviani2017-01-311-3/+3
* ppc: Prevent inifnite loop in decrementer auto-reload.Roman Kapl2017-01-311-2/+6
* target-ppc: Add xscvqpdp instructionBharata B Rao2017-01-314-0/+31
* target-ppc: Add xscvdpqp instructionBharata B Rao2017-01-314-0/+48
* target-ppc: Add xsaddqp instructionsBharata B Rao2017-01-315-0/+41
* ppc: Add ppc_set_compat_all()David Gibson2017-01-313-26/+43
* pseries: Rewrite CAS PVR compatibility logicDavid Gibson2017-01-312-72/+34Star
* pxb: Restrict to x86David Gibson2017-01-313-1/+3
* target-ppc: Add xsxsigqp instructionsNikunj A Dadhania2017-01-312-0/+30
* target-ppc: Add xsxsigdp instructionNikunj A Dadhania2017-01-312-0/+30
* target-ppc: Add xsxexpqp instructionNikunj A Dadhania2017-01-312-0/+16
* target-ppc: Add xsxexpdp instructionNikunj A Dadhania2017-01-312-0/+17
* target-ppc: Use correct precision for FPRF settingBharata B Rao2017-01-312-2/+3
* target-ppc: Add xscvdphp, xscvhpdpBharata B Rao2017-01-316-0/+62
* target-ppc: Rename helper_compute_fprf to helper_compute_fprf_float64Bharata B Rao2017-01-313-70/+73
* target-ppc: Replace isden by float64_is_zero_or_denormalBharata B Rao2017-01-311-10/+1Star
* target-ppc: Use float64 arg in helper_compute_fprf()Bharata B Rao2017-01-311-9/+7Star
* prep: add IBM RS/6000 7020 (40p) machine emulationHervé Poussineau2017-01-312-0/+231
* prep: add IBM RS/6000 7020 (40p) memory controllerHervé Poussineau2017-01-315-0/+242
* prep: add PReP System I/OHervé Poussineau2017-01-313-0/+308
* target-ppc: Add xxinsertw instructionNikunj A Dadhania2017-01-314-2/+30
* target-ppc: Add xxextractuw instructionNikunj A Dadhania2017-01-314-0/+62
* hw/ppc: QOM'ify spapr_vio.cxiaoqiang zhao2017-01-311-10/+0Star
* hw/ppc: QOM'ify ppce500_spin.cxiaoqiang zhao2017-01-311-10/+8Star
* hw/ppc: QOM'ify e500.cxiaoqiang zhao2017-01-311-13/+4Star
* hw/gpio: QOM'ify mpc8xxx.cxiaoqiang zhao2017-01-311-9/+11
* qtest: add ivshmem-test for ppc64Laurent Vivier2017-01-312-5/+15
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