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path: root/accel/tcg/cputlb.c
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* trace: add mmu_index to mem_infoAlex Bennée2019-10-281-0/+2
* cputlb: Pass retaddr to tb_invalidate_phys_page_fastRichard Henderson2019-09-251-5/+1Star
* cputlb: Remove cpu->mem_io_vaddrRichard Henderson2019-09-251-2/+0Star
* cputlb: Handle TLB_NOTDIRTY in probe_accessRichard Henderson2019-09-251-9/+17
* cputlb: Merge and move memory_notdirty_write_{prepare,complete}Richard Henderson2019-09-251-34/+42
* cputlb: Partially inline memory_region_section_get_iotlbRichard Henderson2019-09-251-24/+42
* cputlb: Move NOTDIRTY handling from I/O path to TLB pathRichard Henderson2019-09-251-3/+23
* cputlb: Move ROM handling from I/O path to TLB pathRichard Henderson2019-09-251-15/+21
* cputlb: Introduce TLB_BSWAPRichard Henderson2019-09-251-29/+43
* cputlb: Split out load/store_memopRichard Henderson2019-09-251-52/+55
* cputlb: Use qemu_build_not_reached in load/store_helpersRichard Henderson2019-09-251-3/+2Star
* cputlb: Disable __always_inline__ without optimizationRichard Henderson2019-09-251-2/+2
* tcg: Factor out probe_write() logic into probe_access()David Hildenbrand2019-09-031-11/+32
* tcg: Make probe_write() return a pointer to the host pageDavid Hildenbrand2019-09-031-5/+16
* tcg: Enforce single page access in probe_write()David Hildenbrand2019-09-031-0/+2
* tcg: Check for watchpoints in probe_write()David Hildenbrand2019-09-031-2/+13
* cputlb: Handle watchpoints via TLB_WATCHPOINTRichard Henderson2019-09-031-10/+79
* cputlb: Remove double-alignment in store_helperRichard Henderson2019-09-031-2/+1Star
* cputlb: Fix size operand for tlb_fill on unaligned storeRichard Henderson2019-09-031-1/+4
* cputlb: Fold TLB_RECHECK into TLB_INVALID_MASKRichard Henderson2019-09-031-63/+23Star
* cputlb: Byte swap memory transaction attributeTony Nguyen2019-09-031-0/+12
* memory: Single byte swap along the I/O pathTony Nguyen2019-09-031-39/+3Star
* cputlb: Replace size and endian operands for MemOpTony Nguyen2019-09-031-89/+81Star
* memory: Access MemoryRegion with endiannessTony Nguyen2019-09-031-2/+6
* cputlb: Access MemoryRegion with MemOpTony Nguyen2019-09-031-4/+4
* tcg: TCGMemOp is now accelerator independent MemOpTony Nguyen2019-09-031-1/+1
* cputlb: cast size_t to target_ulong before using for address masksAlex Bennée2019-06-121-1/+1
* cputlb: use uint64_t for interim values for unaligned loadAlex Bennée2019-06-121-1/+1
* cpu: Replace ENV_GET_CPU with env_cpuRichard Henderson2019-06-101-19/+19
* tcg: Create struct CPUTLBRichard Henderson2019-06-101-76/+88
* tcg: Fold CPUTLBWindow into CPUTLBDescRichard Henderson2019-06-101-12/+12
* Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190510' into stagingPeter Maydell2019-05-161-8/+80
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| * tcg: Use tlb_fill probe from tlb_vaddr_to_hostRichard Henderson2019-05-101-8/+61
| * tcg: Use CPUClass::tlb_fill in cputlb.cRichard Henderson2019-05-101-0/+19
* | cputlb: Do unaligned store recursion to outermost functionRichard Henderson2019-05-101-4/+4
* | cputlb: Do unaligned load recursion to outermost functionRichard Henderson2019-05-101-20/+97
* | cputlb: Drop attribute flattenRichard Henderson2019-05-101-63/+42Star
* | cputlb: Move TLB_RECHECK handling into load/store_helperRichard Henderson2019-05-101-71/+55Star
* | accel/tcg: demacro cputlbAlex Bennée2019-05-101-26/+452
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* cputlb: Fix io_readx() to respect the access_typeShahab Vahedi2019-04-251-2/+3
* cputlb: update TLB entry/index after tlb_fillEmilio G. Cota2019-02-111-0/+4
* tcg: Fix LGPL version numberThomas Huth2019-01-301-1/+1
* cputlb: Remove static tlb sizingRichard Henderson2019-01-281-21/+0Star
* tcg: introduce dynamic TLB sizingEmilio G. Cota2019-01-281-5/+197
* cputlb: do not evict empty entries to the vtlbEmilio G. Cota2019-01-281-1/+10
* cputlb: Remove tlb_c.pending_flushesRichard Henderson2018-10-311-14/+2Star
* cputlb: Filter flushes on already clean tlbsRichard Henderson2018-10-311-10/+25
* cputlb: Count "partial" and "elided" tlb flushesRichard Henderson2018-10-311-5/+13
* cputlb: Merge tlb_flush_page into tlb_flush_page_by_mmuidxRichard Henderson2018-10-311-46/+12Star
* cputlb: Merge tlb_flush_nocheck into tlb_flush_by_mmuidx_async_workRichard Henderson2018-10-311-72/+21Star
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