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* trace-events: fix code style: print 0x before hex numbersVladimir Sementsov-Ogievskiy2017-08-011-1/+1
* tcg: Pass generic CPUState to gen_intermediate_code()Lluís Vilanova2017-07-191-1/+1
* exec: [tcg] Use different TBs according to the vCPU's dynamic tracing stateLluís Vilanova2017-07-172-4/+15
* translate-all: remove redundant !tcg_enabled check in dump_exec_infoEmilio G. Cota2017-07-141-5/+0Star
* tcg/aarch64: Use ADRP+ADD to compute target addressPranith Kumar2017-07-101-1/+1
* monitor: disable "info jit" and "info opcount" if !TCGPaolo Bonzini2017-07-041-0/+5
* tcg: make tcg_allowed globalYang Zhong2017-07-043-6/+3Star
* cpu: move interrupt handling out of translate-common.cPaolo Bonzini2017-07-043-54/+33Star
* tcg: move page_size_init() functionYang Zhong2017-07-042-21/+0Star
* vl: convert -tb-size to qemu_strtoulPaolo Bonzini2017-07-041-1/+1
* cpu: Introduce a wrapper for tlb_flush() that can be used in common codeThomas Huth2017-07-041-0/+8
* tcg: consistently access cpu->tb_jmp_cache atomicallyEmilio G. Cota2017-06-302-16/+14Star
* exec: allow to get a pointer for some mmio memory regionKONRAD Frederic2017-06-271-0/+10
* cputlb: fix the way get_page_addr_code fills the tlbKONRAD Frederic2017-06-271-2/+4
* cputlb: move get_page_addr_codeKONRAD Frederic2017-06-271-35/+35
* cputlb: cleanup get_page_addr_code to use VICTIM_TLB_HITKONRAD Frederic2017-06-271-9/+9
* Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20170619' into stagingPeter Maydell2017-06-221-20/+26
* tcg: move tcg backend files into accel/tcg/Yang Zhong2017-06-155-1/+2317
* tcg: move tcg related files into accel/tcg/ subdirectoryYang Zhong2017-06-155-0/+1825
* accel: split the tcg accelerator from accel.c fileYang Zhong2017-06-152-0/+62