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path: root/hw/arm/aspeed_ast10x0.c
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* aspeed: Refactor UART init for multi-SoC machinesPeter Delevoryas2022-07-141-1/+7
* aspeed: Create SRAM name from first CPU indexPeter Delevoryas2022-07-141-1/+4
* hw/misc/aspeed: Add PECI controllerPeter Delevoryas2022-06-301-0/+13
* aspeed: Map unimplemented devices in SoC memoryPeter Delevoryas2022-06-301-6/+10
* aspeed: Remove usage of sysbus_mmio_mapPeter Delevoryas2022-06-301-12/+13
* aspeed: Add memory property to Aspeed SoCPeter Delevoryas2022-06-301-3/+2Star
* aspeed: Add I2C buses to AST1030 modelTroy Lee2022-06-221-0/+18
* hw/gpio: Add ASPEED GPIO model for AST1030Jamin Lin2022-05-251-0/+11
* hw: aspeed: Introduce common UART init functionPeter Delevoryas2022-05-251-5/+2Star
* hw: aspeed: Ensure AST1030 respects uart-defaultPeter Delevoryas2022-05-251-3/+3
* hw: aspeed: Add uarts_num SoC attributePeter Delevoryas2022-05-251-0/+1
* hw: aspeed: Add missing UART'sPeter Delevoryas2022-05-251-0/+24
* aspeed: Introduce a get_irq AspeedSoCClass methodCédric Le Goater2022-05-251-2/+3
* aspeed/soc : Add AST1030 supportSteven Lee2022-05-021-0/+299
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